Semiconductor device manufacturing: process – Chemical etching – Combined with coating step
Reexamination Certificate
2001-06-08
2002-05-07
Lebentritt, Michael S. (Department: 2824)
Semiconductor device manufacturing: process
Chemical etching
Combined with coating step
C438S758000, C438S778000
Reexamination Certificate
active
06383936
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates generally to semiconductor fabrication, and more particularly, to the removal of black silicon in semiconductor fabrication.
2. Description of the Prior Art
In the fabrication of integrated circuits (ICs), trenches are typically formed in a substrate, such as a silicon wafer. Deep trenches (DTs), for example, serve as capacitors for an array of memory cells.
Conventional techniques for forming the trench capacitor deposits a pad dielectric layer and a hard mask layer on the semiconductor substrate. A patterned photoresist layer is then formed over the hard mask layer whereby a portion of the hard mask layer is exposed. The exposed hard mask, together with the pad dielectric, is removed by etch. The etch continues to form a deep trench in the semiconductor substrate. The remaining hard mask is removed, and subsequently, some elements according to the desired IC design, such as a lower electrode, collar oxide, upper electrode and buried strap, are separately formed.
People in the semiconductor industry have found that needle-type surfaces usually between about 3 to 7 microns in length are formed at the edges of the wafer after etching DTs. This needle-type surface is referred to as “black silicon”. Black silicon forms because the remaining pad dielectrics are left on the wafer surface during DT etching. The remaining pad dielectric protects the underlying silicon from being etched. As such, the portions unprotected by the island pad dielectric continue to be etched while the protected portions remain. Therefore, the needle-type surface is formed at the protected portions of silicon substrate during reactive ion etch (RIE).
Black silicon formed during RIE is easily broken off, in turn becoming particles, and can adversely impact manufacturing yield.
As shown in
FIGS. 1A and 1B
, one conventional technique of removing the black silicon
11
in semiconductor fabrication is to coat the wafer with a photoresist
12
while leaving an approximately 3 mm wide region around the edge of the wafer left uncovered with the photoresist, exposing the black silicon formed after forming a DT in a semiconductor substrate
10
.
Although the coating photoresist
12
can expose the black silicon, some DT patterns at the edge of the wafer are uncovered. It is therefore necessary to take a longer time to remove the pad hard mask and the pad dielectric layer to prevent any formation of particles. Also, the coating photoresist
12
may cause die loss at the edge of the wafer.
In addition, the buried strap has a test pattern. To avoid photoresist cracks on the test pattern of the longitudinal buried strap, a conventional O
2
ashing is applied before coating the photoresist
12
. The process of removing black silicon and hard mask then follows.
SUMMARY OF THE INVENTION
It is therefore an object of the invention to provide a photoresist layer covering the whole surface of the wafer to reduce the processing time for removing black silicon and improve manufacturing yield.
It is another object of the invention to streamline the processing steps for removing the hard mask and to obviate the need for O
2
ashing used to prevent cracks in the photoresist layer on the test pattern of the buried strap.
To achieve these objects and advantages, and in accordance with the purpose of the invention, as embodied and broadly described herein, the invention is directed towards a method for removing black silicon in semiconductor fabrication, comprising the steps of removing a hard mask on a semiconductor substrate having a deep trench; coating a photoresist layer which covers in a sufficient manner the edge of the substrate; and removing black silicon unprotected by the photoresist layer.
REFERENCES:
patent: 6033997 (2000-03-01), Perng
patent: 6190955 (2001-02-01), Ilg et al.
Lin Hung-Hsin
Tsai Tzu-Ching
Lebentritt Michael S.
Nanya Technology Corporation
Owens Beth Elise
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