Method for removing a cap from the gate of an embedded...

Semiconductor device manufacturing: process – Chemical etching

Reexamination Certificate

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C438S184000, C438S197000, C438S199000, C438S224000, C438S231000, C438S301000, C438S558000, C257S019000, C257S020000, C257S024000, C257S336000, C257S382000, C257S400000, C257S900000

Reexamination Certificate

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10876544

ABSTRACT:
A method of removing the cap from a gate of an embedded SiGe semiconductor device includes the formation of the embedded SiGe semiconductor device with the cap consisting of a cap material on top of the gate, first sidewall spacers on side surfaces of the gate, and embedded SiGe in source and drain regions. Second sidewall spacers are formed on the first sidewall spacers, these second sidewall spacers consisting of a material different from the cap material. The cap is stripped from the top of the gate with an etchant that selectively etches the cap material and not the second sidewall spacer material.

REFERENCES:
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patent: 6881635 (2005-04-01), Chidambarrao et al.
patent: 6972222 (2005-12-01), Cho et al.
S.Wolf, Silicon Processing for the VLSI Era, vol. 1 Lattice Press (1986), pp. 521-526, 529-536, 555-556.
B.Streetman, Solid State Electronic Devices, 3rdEdn. Prentice Hall, (1990), pp. 347-349.
Waite, A., et al. “A Novel Deep Submicron Elevated Source/Drain MOSFET.” pp. 148-151 no date.
Ghani, T., et al. “A 90nm high Volume Manufacturing Logic Technology Featuring Novel 45nm Gate Length Strained Silicon CMOS Transistors.” IEDM 2003, pp. 1-17, date unavailable.

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