Static information storage and retrieval – Read/write circuit – Data refresh
Patent
1988-06-17
1989-06-13
Hecker, Stuart N.
Static information storage and retrieval
Read/write circuit
Data refresh
365233, G11C 700, G11C 1140
Patent
active
048398675
ABSTRACT:
A method for controlling refreshing of data in a dynamic memory unit comprising a refresh generator and a timer provides that during a time interval of, for example, 10-16 .mu.s between two successively following refresh cycles, a first memory cycle at the beginning of a first time interval of, for example, 10 .mu.s lying therein triggers a refresh cycle that is concluded in the pause between cycles before the possible leading edge of an earliest possible, next memory cycle. Each further memory cycle within the first time interval, which is clearly longer than the minimum duration of, for example, 1 .mu.s between the start times 2 memory cycles following immediately upon one another, subsequently triggers no further refresh cycle. After the beginning of the following, second time interval of, for example, 5 .mu.s, a next, x.sup.th memory cycle occurring within the second time interval triggers a next refresh cycle which is concluded before the possible start of an earliest possible, x+1.sup.st memory cycle, whereby the x.sup.th memory cycle or a clock derived therefrom triggers the beginning of a new first time interval, so that every further memory cycle after the next refresh cycle which lies within the new first time interval does not trigger any further refresh cycle. In case no x.sup.th memory cycle is executed in the second time interval, the next refresh cycle is quickly triggered subsequent thereto, i.e., for example, 16 .mu.s after the start of the new first time interval, this in turn again triggering the start of a next, first time interval.
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Bowler Alyssa H.
Hecker Stuart N.
Siemens Aktiengesellschaft
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