Method for reducing wiring and required number of redundant...

Details Method for reducing wiring and required number of redundant... Method for reducing wiring and required number of redundant...

2006-11-14

2008-10-28

Dinh, Son (Department: 2824)

Static information storage and retrieval

Read/write circuit

Bad bit

C365S063000, C365S230020

Reexamination Certificate

active

07443744

ABSTRACT:
A method and enhanced Static Random Access Memory (SRAM) redundancy circuit reduce wiring and the required number of redundant elements. A bitline redundancy mechanism allows the swapping of a pair of bitlines for a redundant pair of bit columns. Two of the adjacent bitlines are swapped out at a time, one even and one odd. The swap is accomplished by steering the data around the bad columns and adding redundant columns on the end that are steered in when needed.

REFERENCES:
patent: 6571348 (2003-05-01), Tsai et al.
patent: 6885596 (2005-04-01), Asano et al.

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