Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching
Reexamination Certificate
1999-03-30
2003-10-21
Chen, Kin-Chan (Department: 1765)
Semiconductor device manufacturing: process
Chemical etching
Vapor phase etching
C438S707000
Reexamination Certificate
active
06635577
ABSTRACT:
BACKGROUND OF THE DISCLOSURE
1. Field of the Invention
The invention relates to semiconductor wafer processing systems and, more particularly, the invention relates to a method of reducing topography dependent charging effects in a plasma enhanced semiconductor wafer processing system.
2. Description of the Background Art
As structures fabricated upon semiconductor wafers are reduced in size, charging damage has become a serious problem. Charging damage generally occurs when structures being formed on a semiconductor wafer using a plasma enhanced process cause non-uniform charging of the structures such that a differential voltage is formed on the structures. Such a differential voltage can produce high currents or arcing in the structure that damages the structure. For example, a plasma etch process can damage the gate oxide of a transistor structure due to a Fowler-Nordheim current produced by structure charging.
Electron shading is one of-the main contributors to structure charging. Electron shading is caused by the formation of structures having a dense line pattern having a high aspect ratio. Electron shading results from the isotropic movement of electrons in a process chamber during plasma processing versus the anisotropic movement of ions contained in the plasma. The electrons impact the sidewalls and other vertical surfaces of the structures and charge the structures. However, a high aspect ratio of these structures causes portions near the plasma to be impacted by more electrons than the “deep” portions of the structure. As such, the “shading” of the deep portions results in a voltage differential over the structure. Such structure charging may result from the use of any plasma process to process a wafer. As a result, many plasma processes are capable of causing topography dependent charging damage of structures on a semiconductor wafer. Topography dependent charging impacts many aspects of semiconductor wafer processing including: electron shading damage, notching, loss of profile control, aspect ratio dependent etching, etch stop, microloading, decreased photoresist selectivity, photoresist striations, and decreased etch rate.
Therefore, a need exists in the art for a method of reducing topography dependent charging.
SUMMARY OF THE INVENTION
The disadvantages associated with the prior art are overcome by the present invention of a method for reducing topography dependent charging damage. The method comprises the steps of exposing a semiconductor wafer comprising a structure to a plasma that causes the structure to experience electric charging, then exposing the semiconductor wafer to a particle source that removes the electric charge from the structure. By discharging the structure in this manner, the structure will not experience charging damage. One embodiment of the invention exposes the wafer to ultraviolet light as a source of particles (photons), while another embodiment of the invention exposes the wafer to a plasma of ions. The exposure to particles may occur continuously during the plasma processing of the wafer or during periods when the plasma processing is expected to cause charging damage.
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Huang Kenlin
Loewengardt Peter K.
Ma Diana Xiaobing
Yamartino John M.
Applied Materials Inc
Bach Joseph
Chen Kin-Chan
Moser Patterson & Sheridan
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