Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Patent
1996-06-19
1999-12-21
Niebling, John F.
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
438787, 438798, H01L 214763
Patent
active
060048735
ABSTRACT:
A method for forming upon a patterned layer within an integrated circuit an ozone assisted Chemical Vapor Deposited (CVD) silicon oxide insulator layer having a diminished pattern sensitivity. There is first provided a semiconductor substrate. Formed upon the semiconductor substrate is a patterned layer which provides a pattern sensitivity to an ozone assisted Chemical Vapor Deposited (CVD) silicon oxide insulator layer formed upon the patterned layer. The patterned layer is also susceptible to modification with a plasma which reduces the pattern sensitivity of the ozone assisted Chemical Vapor Deposited (CVD) silicon oxide insulator layer formed upon the patterned layer. The patterned layer is treated with the plasma. Finally, the ozone assisted Chemical Vapor Deposited (CVD) silicon oxide insulator layer is formed upon the patterned layer. Optionally, a conformal insulator layer may be formed upon the patterned layer prior to forming the ozone assisted Chemical Vapor Deposited (CVD) silicon oxide insulator layer upon the patterned layer. The conformal insulator layer may optionally be treated with a second plasma.
REFERENCES:
patent: 5342808 (1994-08-01), Brigham et al.
patent: 5674783 (1997-10-01), Jang et al.
Jang Syun-Ming
Liu Lu-Min
Ackerman Stephen B.
Murphy John
Niebling John F.
Saile George O.
Szecsy Alek P.
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