Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Patent
1999-08-31
2000-10-31
Fourson, George
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
438638, H01L 21283
Patent
active
06140232&
ABSTRACT:
A method for forming narrow line width silicide having reduced sheet resistance is disclosed by the present invention. The method includes: firstly, providing a semiconductor substrate, whereon there formed at least a source/drain region and a gate region, as well as a spacer formed on a sidewall of the gate region; then, depositing a titanium metal layer overlying the semiconductor substrate and the resulting structure; next, carrying out rapid thermal processing and RCA cleaning to form a first titanium silicide layer; consequentially, forming a selective polysilicon layer over the first titanium silicide layer; and, depositing a second titanium metal layer over the selective polysilicon layer and overlying the exposed surface of spacer; finally, carrying out rapid thermal processing and RCA cleaning once again to form a second titanium silicide layer. The overall thickness of titanium silicide is depending on the requiring resistance of titanium silicide under a certain line width.
REFERENCES:
patent: 4751198 (1988-06-01), Anderson
patent: 5451545 (1995-09-01), Ramaswami et al.
patent: 5573980 (1996-11-01), Yoo
patent: 5913139 (1999-06-01), Hashimoto et al.
patent: 5963829 (1999-10-01), Matsubara
Lin Yu-Tsai
Wu Kun-Lin
Fourson George
Garcia Joannie A.
United Microelectronics Corp.
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