Method for reducing semiconductor die warpage

Details Method for reducing semiconductor die warpage Method for reducing semiconductor die warpage

2007-08-14

2007-08-14

Tran, Long K. (Department: 2818)

Semiconductor device manufacturing: process

Semiconductor substrate dicing

C438S033000, C438S113000, C438S457000, C438S458000, C257SE21484, C257SE21596, C257SE21599

Reexamination Certificate

active

11252990

ABSTRACT:
An anti-warpage backgrinding tape (11) is secured to the circuit side (12) of a semiconductor wafer (14). The backside (16) of the wafer is background. The backside of the wafer is secured to dicing tape (18) so that the anti-warpage backgrinding tape is exposed. The wafer is diced to create individual die structure (34). The die structure comprises semiconductor die (22) with anti-warpage tape elements (36) on circuit sides of the semiconductor die. A die structure is removed from the dicing tape. The backside of the die of the die structure is adhered to a substrate (24). The anti-warpage tape element is removed from the die. The anti-warpage backgrinding tape is preferably partially or fully transparent to permit sensing of guide markings on the wafer during wafer dicing. The adhesive is preferably a curable adhesive. The adhesion between the anti-warpage tape element and the chosen die may be reduced by the application of heat (38).

REFERENCES:
patent: 6426275 (2002-07-01), Arisa
patent: 7081678 (2006-07-01), Liu
patent: 7115484 (2006-10-01), Feng
patent: 2002/0055238 (2002-05-01), Sugino et al.

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