Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching
Reexamination Certificate
2006-02-28
2006-02-28
Norton, Nadine G. (Department: 1765)
Semiconductor device manufacturing: process
Chemical etching
Vapor phase etching
C438S714000, C438S724000, C438S725000
Reexamination Certificate
active
07005386
ABSTRACT:
According to one exemplary embodiment, a method for reducing resist height erosion in a gate etch process comprises a step of forming a first resist mask on an anti-reflective coating layer situated over a substrate, where the first resist mask has a first width. The anti-reflective coating layer may be, for example, an organic material. The method further comprises a step of trimming the first resist mask to form a second resist mask, where the second resist mask has a second width, and where the second width is less than the first width. The step of trimming the first resist mask may further comprise, for example, etching the anti-reflective coating layer. According to this exemplary embodiment, the method further comprises a step of performing an HBr plasma treatment on the second resist mask, wherein the HBr plasma treatment causes a vertical etch rate of the second resist mask to decrease.
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Bell Scott
Dakshina-Murthy Srikanteswara
Khathuria Ashok M.
Yang Chih-Yuh
Advanced Micro Devices , Inc.
Farjami & Farjami LLP
Norton Nadine G.
Tran Binh X.
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