Method for reducing power consumption in a state retaining...

Electrical computers and digital processing systems: support – Computer power control – Power conservation

Reexamination Certificate

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Details

C713S300000, C713S323000, C713S324000, C326S136000

Reexamination Certificate

active

07577858

ABSTRACT:
A method for reducing the power consumption in a state retaining circuit during a standby mode is disclosed comprising, in an active state, providing a regular power supply (VDD) and a standby power supply (VDD STANDBY) to the state retaining circuit; for a transition from an active state to a standby state, decreasing the regular power supply to ground level and maintaining the standby power supply (VDD STANDBY) thus providing the circuit elements (36, 142, 78, 85) of the state retaining circuit with enough power for retaining the state during standby mode; and for a transition from the standby state to the active state, increasing the regular power supply (VDD) from its ground level to its active level. A circuit for reducing the power consumption in a state retaining circuit during a standby mode is disclosed comprising a control unit (1) providing at least one control signal; a data input unit (3) providing at least one input signal; a data output unit (7) providing at least one output signal; a data storage unit (5) for holding the state of the circuit during an a standby mode; a regular power supply supplying power to the data storage unit (5) during an active mode; and a standby power supply supplying power to at least a part of the data storage unit (5) during the active mode and the standby mode.

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