Method for reducing dimensions between patterns on a...

Details Method for reducing dimensions between patterns on a... Method for reducing dimensions between patterns on a...

2006-04-25

2006-04-25

Le, Dung A. (Department: 2818)

Semiconductor device manufacturing: process

Chemical etching

Vapor phase etching

C438S703000, C438S696000

Reexamination Certificate

active

07033948

ABSTRACT:
A semiconductor manufacturing method that includes defining a substrate, depositing a polysilicon layer over the substrate, depositing a layer of photoresist over the polysilicon layer, patterning and defining the photoresist layer, depositing a layer of inorganic material over the patterned and defined photoresist layer, wherein the layer of inorganic material is conformal and photo-insensitive, and anisotropic etching the layer of inorganic material and the layer of semiconductor material.

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