Method for reducing device and circuit sensitivity to...

Semiconductor device manufacturing: process – Coating of substrate containing semiconductor region or of... – Insulative material deposited upon semiconductive substrate

Reexamination Certificate

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C438S798000

Reexamination Certificate

active

07459403

ABSTRACT:
In microelectronic circuits involving dielectric/semiconductor interfaces having interstitial sites in the dielectric, a method for hardening these interfaces by introducing a small atomic diameter inert gas into the interstitial sites.

REFERENCES:
patent: 6265327 (2001-07-01), Kobayashi et al.
patent: 6444533 (2002-09-01), Lyding et al.
patent: 6544908 (2003-04-01), Weimer et al.
patent: 6949433 (2005-09-01), Hidehiko et al.
D. J. DiMaria, Defect generation in field-effect transistors under channel-hot-electron stress,: J. Appl. Phys. 87 8707-8715 (2000).
J. H. Stathis, “Reliability limits for the gate insulator in CMOS technology,” IBM J. Res & Dev. 64 265-286 (2002).
D. J. DiMaria and J. H. Stathis,“Anode hole injection, defect generation and breakdown in ultra-thin silicon dioxide films,” J. Appl. Phys. 89 5015-5024 (2001).
S. Zafar et al, “Negative bias temperature instability, charge trapping and high k dielectric stacks” 6th Annual Topical Conference on Reliability, Austin, Tx (2003).
D. Brown and N. S. Saks, Time dependence of radiation-induced interface trap formation in metal-oxide-semiconductor devices as a function of oxide thickness and applied field, unknown date.
J. E. Shelby, “Handbook of Gas Diffusion in Solids and Melts”, ASM International, 1996.

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