Method for reducing borderless contact leakage by OPC

Details Method for reducing borderless contact leakage by OPC Method for reducing borderless contact leakage by OPC

2001-01-31

2002-09-17

Christianson, Keith (Department: 2813)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

C438S598000, C438S795000, C438S942000

Reexamination Certificate

active

06451680

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention generally pertains to a method for reducing borderless contact leakage, and more particularly to a method for reducing borderless contact leakage by optical proximity compensation (OPC) method.
2. Description of the Prior Art
Trench isolation is fast becoming the standard means of isolation in complex semiconductor devices, replacing the well established LOCOS (Localized Oxidation of Silicon) method of isolation. In a standard trench isolation process, trenches are formed in a semiconductor substrate between what are to become active areas that need to be isolated from one another. The trenches are filled with an insulating material, such as oxide, to provide electrical insulation. Active devices, including transistors and resistors, are then built and formed on and over the semiconductor substrate in appropriate active regions and between the isolation trenches.
One problem with the standard trench isolation process is leakage. A borderless contact is a contact which overlies and exposes both the active and isolation regions of the semiconductor substrate, usually for the purpose of making contact to a diffusion region formed in the substrate, as shown in
FIG. 1. A
substrate
10
is provided with trench isolation
20
formed therein, and a liner layer
22
, such as silicon nitride, is usually formed between the isolation
20
and the substrate
10
such that borderless contact will automatically stop on this layer to prevent overetching of trench isolation
20
and leakage. A MOS (metal-oxide-semiconductor) transistor, which comprises gate electrode
30
, source/drain regions
34
and spacers
32
, is formed in and on the substrate
10
. An interlevel dielectric layer
40
is deposited on the substrate
10
and a borderless contact
50
is formed in the dielectric. layer
40
to expose a portion of both source/drain regions and isolation
20
.
However, mis-alignment will dominate the leakage when the borderless contact is off the border of diffusion. There is a phenomenon that the contact outside the diffusion with alignment off two sides of diffusion will have large leakage compared to contact inside the diffusion with off two sides of diffusion, as shown in FIG.
2
and FIG.
3
. Referring to
FIG. 2
, an L-shaped diffusion region
12
from top view is provided and a borderless contact
50
is on the outer corner of the diffusion region
12
. On the other hand, a borderless contact
50
on the inside of a diffusion area
12
is shown in FIG.
3
. The overlapped region between contact and diffusion region in
FIG. 2
is less than the overlapped region in FIG.
3
.
Worst, the outer corner of a diffusion area pattern is rounded in exposure of a lithography process, as shown in FIG.
4
and FIG.
5
. Contact
50
on the inside of diffusion region
12
will not reduce the overlapped area, as shown in FIG.
5
. However, if contact
50
is on the outer corner of diffusion region
12
, the overlapped area will be compressed, and leakage current will increase.
SUMMARY OF THE INVENTION
In accordance with the present invention, a method is provided for forming borderless contact that substantially increases the overlapped area between diffusion area and borderless contact and hence reduces borderless contact leakage.
In one embodiment, a method for reducing borderless contact leakage is provided. The method includes performing an optical proximity correction on an outer corner of an active area mask to form an active area on a substrate such that a portion of an outer corner of the active area is enlarged in the photolithography process. Then, a dielectric layer is deposited on the substrate. A borderless contact is formed in the dielectric layer to make contact with the outer corner of the active area, whereby the enlarged portion of the outer corner of the active area increases the overlapped area between the borderless contact and the active area, and reduces borderless contact leakage.


REFERENCES:
patent: 6080527 (2000-06-01), Huang et al.
patent: 6282696 (2001-08-01), Garza et al.

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