Electrical computers and digital data processing systems: input/ – Input/output data processing – Input/output data buffering
Reexamination Certificate
1999-04-21
2003-02-11
Gaffin, Jeffrey (Department: 2782)
Electrical computers and digital data processing systems: input/
Input/output data processing
Input/output data buffering
C710S053000, C710S054000, C710S058000, C710S060000, C709S241000
Reexamination Certificate
active
06519661
ABSTRACT:
BACKGROUND OF THE INVENTION
The invention relates to a method for recording data about internal and external messages in a software system which is, in particular, part of a digital telecommunications switching center.
One such method is based on the following:
In a digital telecommunications switching center, the current states of adjacent assemblies are monitored, for example, with the aid of a software system which is stored on a so-called controller assembly, and is preferably composed of a plurality of components. This is achieved, in particular, in that data relating to external messages which are transmitted from the adjacent assemblies via an interface to the controller assembly, as well as internal messages which are interchanged between the said components, are recorded in the software system. The said external messages primarily contain information about the various states of the adjacent assembly, while the internal messages predominantly initiate actions which have a controlling influence on the adjacent assemblies.
In previously known software systems of this type, the recorded data relating to such messages are transmitted via a serial interface, for example V.24, to a data-processing system, preferably a personal computer, which processes the received data further.
Such a procedure is disadvantageous since, particularly during high-load phases in the digital telecommunications switching center, only a portion of the data recorded in the software system and relating to internal and external messages can be transmitted to the data-processing system, for further processing, via the serial V.24 interface, which normally has a data rate of 9.6 kBit/s and controls data transmission using reception of acknowledgments. This leads to a massive build-up of data in the software system, as a result of which internal resources are exhausted and, in the worst case, this causes a system crash.
SUMMARY OF THE INVENTION
An object of the invention is to provide a method for recording data about internal and external messages in a software system such that the recording of data relating to internal and external messages has no adverse effect on the system.
The principle on which the invention is based is that the data to be recorded relating to internal and external messages are transmitted to at least one buffer store and area stored there. In this case, the data transmission is carried out in such a manner that the receiver does not acknowledge receipt of the data, and the transmitter does not wait for acknowledgment of reception. The data stored in the buffer store are read only after a request from the data-processing system, for the purpose of processing them further.
The method according to the invention is distinguished in particular in that the data recorded in the software system and relating to internal and external messages are transmitted without any delay to at least one buffer store, thus avoiding a build-up of data and exhaustion of internal resources resulting from this. A further advantage is that the data-processing system can control the further processing of the data to be recorded, independently of the time at which the data have been recorded in the software system.
It has also been found to be advantageous for the data to be recorded to be transmitted to at least one buffer store immediately after they have been registered in the software system. The recording of the data is advantageously carried out by registering at least one message at at least one point defined in the software system.
In a further refinement of the invention, the data to be recorded are transmitted bit-by-bit in parallel to at least one buffer store, in order to achieve a data rate that is as high as possible.
According to one advantageous development of the invention, the buffer store is designed in such a manner that the data item stored first in the buffer store is always the first to be read again, and may then be deleted or read and then overwritten (FIFO principle).
Other advantageous refinements of the invention provide that at a specific utilization level of the buffer store, the data-processing system receives a message, and, on the other hand, that if the buffer store in the data-processing system overflows, an overflow error is reported.
In order to make it easier to store the data to be recorded in a buffer store, a data item to be recorded can be provided with a start and/or end marking.
Further refinements of the invention simplify, in particular, the identification of loss of a data item to be recorded before or during the further processing.
It has accordingly been found to be advantageous if a data item to be recorded also contains the time at which a message has been registered at a point defined in the software system.
It is also advantageous if a data item to be recorded also contains an identification number of the point which is defined in the software system and at which a message has been registered.
A further advantageous refinement of the invention provides that a subset of data, chosen by filtering, can be read from a buffer store and may be deleted. In this way, the number of data items intended for further processing can be reduced.
An exemplary embodiment of the invention is explained in more detail in the following detailed description of the preferred embodiments with reference to the accompanying drawings.
REFERENCES:
patent: 5163045 (1992-11-01), Caram et al.
patent: 5809012 (1998-09-01), Takase et al.
patent: 5872930 (1999-02-01), Masters et al.
patent: 6137798 (2000-10-01), Nishihara et al.
patent: 6205145 (2001-03-01), Yamazaki
Lillemann Rein
Schuon Ulrich
Gaffin Jeffrey
Perveen Rehana
Schiff & Hardin & Waite
Siemens Aktiengesellschaft
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