Error detection/correction and fault detection/recovery – Pulse or data error handling – Error count or rate
Reexamination Certificate
2007-11-30
2009-06-16
Kerveros, James C (Department: 2117)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Error count or rate
Reexamination Certificate
active
07549094
ABSTRACT:
The present invention discloses a method for receiving data by a universal asynchronous receiver transmitter, which includes a receive shift register (RSR), a receiver FIFO, a receiver buffer register (RBR), a line status register (LSR), and a good data length register (GDL). The RSR is connected to the receiver FIFO and the LSR in parallel. The receiver FIFO is further connected to the RBR, and the LSR is connected to the GDL. The receiver buffer register, the good data length register, and the line status register are connected to a microprocessor through a bus, such that when the receive shift register receives a plurality of serial data, the good data length register counts the number of correct data, and the microprocessor uses the count of the good data length register as a number of times for reading the receiver buffer register thereby enhance the performance of reading data.
REFERENCES:
patent: 5617433 (1997-04-01), Suzuki
Bacon & Thomas PLLC
Kerveros James C
Moxa Technologies Co., Ltd.
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