Method for realizing circuit layout using cell library

Details Method for realizing circuit layout using cell library Method for realizing circuit layout using cell library

2008-01-29

2008-01-29

Do, Thuan (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000

Reexamination Certificate

active

07325214

ABSTRACT:
A method for realizing circuit layouts. Complex integrated circuit includes cells of basic functions, and layout designs for these cells can be recorded as a library. The claimed invention replaces common power strips with grid power contacts/vias in the layout of each cell. While realizing the layout of an integrated circuit, a routing procedure is used to connect power of all cells arranged in the integrated circuit. Because power strips are avoided in each cell, the claimed invention can reduce layout height of each cell, and therefore increase integration of integrated circuits.

REFERENCES:
patent: 4623911 (1986-11-01), Pryor
patent: 6477696 (2002-11-01), Tien
patent: 6536028 (2003-03-01), Katsioulas et al.

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