Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
Patent
1997-02-07
1999-08-31
Cabeca, John W.
Electrical computers and digital processing systems: memory
Storage accessing and control
Specific memory composition
711201, 365203, 365233, 36523006, G06F 1200
Patent
active
059467037
ABSTRACT:
A method for reading data in a data reading and writing system is disclosed. The method can effectively shorten the data-reading cycle. The method comprises the steps of: (1) providing a clock signal for serving as a pulse source of a synchronous signal for the data reading and writing system; (2) providing an enable signal for activating the data reading and writing system into a data reading cycle; (3) providing an address signal and decoding the address signal into a memory address signal; (4) comparing addresses of two successive memory address signals to obtain a comparison signal; (5) providing a column address strobe and a row address strobe for obtaining a memory address from the memory address signal, wherein the step of comparing addresses of two successive memory address signals and the step of obtaining a memory address are executed at the same time; (6) allowing the data reading and writing system to output a memory data output in response to the obtainment of the memory address; and (7) repeating steps (2), (3) and (5) till the data reading procedure is completed.
REFERENCES:
patent: 5021951 (1991-06-01), Baba
patent: 5713006 (1998-01-01), Shigeeds
patent: 5724553 (1998-03-01), Shigeeds
patent: 5734204 (1998-03-01), Sobue
Chen Joseph
Chen Michael T. H.
Cabeca John W.
Namazi Mehdi
Silicon Integrated Systems Corp.
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