Static information storage and retrieval – Read/write circuit – Data refresh
Patent
1998-12-04
1999-11-02
Nguyen, Tan T.
Static information storage and retrieval
Read/write circuit
Data refresh
G11C 11406
Patent
active
059782960
ABSTRACT:
The invention relates to a method for reading and refreshing data contents of a dynamic semiconductor memory having many volatile memory cells disposed in columns and rows in a matrix. The reading of the data contents from addressed memory cells is done with the aid of at least two data buses. The data contents are applied word by word to the data buses and a refreshing of the data contents of the memory cells is effected by a refresh pulse. According to the invention, it is provided that the data words applied to the data buses after the triggering of the refresh pulse are maintained for a predetermined period of time on all the data buses and only after that are the data words removed by of a shutoff pulse.
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"Trends in High-Speed DRAM Architecture", Kumanoya et al., IEICE Trans. Electron. vol. E 79-C, No. 4, Apr. 1996, pp. 472-481.
Greenberg Laurence A.
Lerner Herbert L.
Nguyen Tan T.
Siemens Aktiengesellschaft
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