Method for reading a structural phase-change memory

Static information storage and retrieval – Systems using particular element – Semiconductive

Reexamination Certificate

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Details

C365S203000, C365S163000, C365S100000

Reexamination Certificate

active

06707712

ABSTRACT:

BACKGROUND
This invention is related to read operations that are applied to read a phase-change material solid state memory device.
Solid state memory devices that use a structural phase-change material as the data storage mechanism (referred to here simply as ‘phase-change memories’) offer significant advantages in both cost and performance over conventional charge storage based memories. The phase-change memory is made of an array of constituent cells where each cell has some structural phase-change material to store the cell's data. This material may be, for instance, a chalcogenide alloy that exhibits a reversible structural phase change from amorphous to crystalline. A small volume of the chalcogenide alloy is integrated into a circuit that allows the cell to act as a fast switching programmable resistor. This programmable resistor can exhibit greater than 40 times dynamic range of resistivity between a relatively crystalline phase (low resistivity) and a relatively amorphous phase (high resistivity). The data stored in the cell is read by measuring the cell's resistance. The chalcogenide alloy cell is also non-volatile.
The phase-change memory cell can be programmed, i.e. written to, and read by applying current pulses that have the appropriate magnitude and duration and that cause the needed voltages across and current through the volume of phase-change material in the cell. A selected cell in a structural phase-change memory may be programmed into a selected state by raising a cell voltage and a cell current for the selected cell to programming threshold levels that are characteristic of the phase-change material in the cell. The voltage and current are then typically lowered to quiescent levels (e.g. essentially zero voltage and current) which are below their programming threshold levels. This process may be performed by the application of, for example, a reset pulse and a set pulse which can program the cell into two different logic states. In both of these pulses, the cell voltage and cell current are caused to rise at least as high as certain threshold voltage and current levels needed to program the cell. Next, to read the programmed cell, a read pulse may be applied to measure the relative resistance of the cell material, without changing its phase. Thus, the read pulse typically provides a much smaller magnitude of cell current and cell voltage than either the reset pulse or the set pulse.


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U.S. patent application, pending, Xu et al., 09/895,599, filed Jun. 29, 2001.
U.S. patent application, pending, Xu et al., 10/034331, filed Dec. 28, 2001.

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