Electrical computers and digital processing systems: processing – Processing control – Arithmetic operation instruction processing
Reexamination Certificate
2007-01-02
2007-01-02
Donaghue, Larry D. (Department: 2154)
Electrical computers and digital processing systems: processing
Processing control
Arithmetic operation instruction processing
C712S221000, C712S022000, C708S490000
Reexamination Certificate
active
09223046
ABSTRACT:
The present invention provides extended precision in SIMD arithmetic operations in a processor having a register file and an accumulator. A first set of data elements and a second set of data elements are loaded into a first vector register and a second vector register, respectively. Each data element comprises N bits. Next, an arithmetic instruction is fetched from memory. The arithmetic instruction is decoded. Then, a first vector register and a second vector register are read from the register file. The present invention then executes the arithmetic instruction on corresponding data elements in the first and second vector registers. The result of the execution is then written into the accumulator. Then, each element in the accumulator is transformed into an N-bit width element and stored into the memory.
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Hsu Peter
Huffman William A.
Killian Earl A.
Moreton Henry P.
van Hook Timothy
Donaghue Larry D.
MIPS Technologies Inc.
Sterne Kessler Goldstein & Fox P.L.L.C.
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