Data processing: structural design – modeling – simulation – and em – Simulating electronic device or electrical system – Circuit simulation
Reexamination Certificate
2006-12-26
2006-12-26
Rodriguez, Paul (Department: 2123)
Data processing: structural design, modeling, simulation, and em
Simulating electronic device or electrical system
Circuit simulation
C716S030000, C716S030000
Reexamination Certificate
active
07155378
ABSTRACT:
A method of providing ad hoc verification for a simulation includes generating a cumulative record of a state value for the simulation of a circuit design, comparing the cumulative record of the state value to a golden record of the state value to obtain a comparison result, and performing ad hoc verification of the circuit design using the comparison result.
REFERENCES:
patent: 6009256 (1999-12-01), Tseng et al.
patent: 6272451 (2001-08-01), Mason et al.
patent: 6295623 (2001-09-01), Lesmeister et al.
John Hayes, Transition Count Testing Of Combinational Logic Circuits, Jun. 1976, IEEE Transactions On Computers, vol. C-25, No. 6, pp. 613-620.
Bierman Keith H.
Chen Liang T.
Emberson David R.
Ochoa Juan
Osha & Liang LLP
Rodriguez Paul
Sun Microsystems Inc.
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