Electrical computers and digital processing systems: memory – Storage accessing and control – Memory configuring
Reexamination Certificate
2006-07-11
2006-07-11
Padmanaghan, Mano (Department: 2185)
Electrical computers and digital processing systems: memory
Storage accessing and control
Memory configuring
C711S100000, C711S150000, C711S168000
Reexamination Certificate
active
07076629
ABSTRACT:
The specification discloses a heap memory management system in which software streams remove and replace blocks of heap memory from the heap pile, managed in a linked list fashion, in a last-in/first-out fashion at the top of the list. A hardware device returns blocks of heap memory, and this return is to the end or bottom of the linked list. In this way, software streams may remove and return blocks of heap memory simultaneously with hardware devices returning blocks of heap memory.
REFERENCES:
patent: 6076151 (2000-06-01), Meier
patent: 6412053 (2002-06-01), Bonola
patent: 6504768 (2003-01-01), Roohparvar et al.
patent: 2001/0056420 (2001-12-01), Steele et al.
patent: 2002/0144073 (2002-10-01), Trainin et al.
Non-Blocking Algorithms and Preemption-Safe Locking on Multiprogrammed Shared Memory Multiprocessors, Maged M. Michael, Michael L. Scott, Mar. 1997 (35 pg.).
Padmanaghan Mano
Rojas Midys
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