Method for providing and operating upgradeable cache circuitry

Details Method for providing and operating upgradeable cache circuitry Method for providing and operating upgradeable cache circuitry

1997-10-31

1998-10-27

Swann, Tod R.

Electrical computers and digital processing systems: memory

Storage accessing and control

Hierarchical memories

711115, G06F 1300

Patent

active

058290362

ABSTRACT:
An upgradeable cache circuit is described which automatically routes those control signals necessary to maintain cache coherency in a computer system having a processor (with integrated L1 cache) coupled with main memory by a controller. The cache circuit includes an L2 cache module connector and a high speed multiplexer having minimal propagation delay. The multiplexer selects one of two sets of control signals to route to and from the processor, controller and cache circuit, corresponding to the presence or absence of an L2 cache module in the cache module connector.

REFERENCES:
patent: 5586270 (1996-12-01), Rotier et al.
patent: 5604871 (1997-02-01), Pecone
patent: 5604875 (1997-02-01), Munce
patent: 5640531 (1997-06-01), Whittaker et al.
Intel Corporation "COASt 3.1, Flexible Cache Solution for the Intel 430FX, 430HX and 430VX PCIset," pp. 1-41, Jun. 10, 1996.

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