Method for providing a metallization layer on an insulating laye

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

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438690, 438712, 438940, H01L 2144

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059666331

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BRIEF SUMMARY
The invention relates to a method whereby a metallization layer can be provided on an insulating layer, and whereby through holes can be opened in the said insulating layer simultaneously and with the same mask. A method of this sort can be used in the fields of thin film technology or semi-conductor technology, in particular for the thin film wiring of multiple layer ceramic substrates.
In thin film technology, it, is advantageous to work on a flat substrate. In this way, it is possible to avoid or at least to minimize faults during the metallization, in particular short circuits and holes in the substrate. In the case of a rough substrate, an attempt is usually made to correct this roughness by introducing an intermediate br planarising layer before the thin film is applied. This planarising layer can also be used as an insulating layer, in order to insulate desired and/or undesired metal residues from preceding processes on the surface of the subsequent metallization level. However, this planarising layer imposes additional requirements on the process sequence, since the electrical contacts to the substrate actually have to be opened first. Processes are feasible such as, for example, polishing back the planarising layer to the level of the substrate electrical contacts. Since the metallization of the substrate must not be damaged when this is done, it proves to be a very difficult process.
It is therefore more obvious to etch through openings into the insulating layer, and to fill these with metal. However, this again imposes very high requirements on the etching process, since flat flanks must be etched into the insulating layer for a continuous and reliable metallic connection over the through openings. If technical reasons mean that only steep edges are possible in the insulating layer, this makes it necessary to precipitate the metal and to polish back subsequently. In addition, there is the fact that--apart from the additional costs for this two-mask process (the formation of through openings and of metal conducting leads)--additional space is necessary for the adjustment and process tolerances, which increases the active area and reduces the yield.
Another decisive factor is the selection of the insulating material. Thus, due to the lack of an etching stop in the case of reactive ion etching with oxygen ions in the two mask process, use cannot be made of any organic insulating layer, such as polyimide, for subsequent detachment or lift-off processes.
A high temperature lift-off process for polyimide structures is described in the IBM Technical Disclosure Bulletin, Vol. 23, No. 6, November 1980, pages 2293/2294. A high temperature lift-off process of this sort requires etching in oxygen plasma and cannot therefore be executed on an unprotected polyimide surface, since the polyimide will also be attacked by this etching process. During the reactive ion etching, a thin layer of silicon nitride is therefore used as the etching stop.
It is the task of the invention to make a process available which enables the provision of a metallization layer on an insulating layer, and the opening of through holes in this layer by means of the same mask, and without the use of an etching stop layer.
A substrate is made available with a first and a second insulating layer on the surface of the substrate, a cover layer on the second insulating layer, a structured mask layer on the cover layer, and through openings filled with metal which extend from the rear side of the substrate as far as the surface of the substrate. The mask layer is structured in such a manner that it features openings in the areas facing the through openings and in the areas which are to be covered with a metal layer. In those areas which are not covered by the structured mask layer, the cover layer is opened by means of a first etch process. Following this, the second insulating layer is laser ablated in those areas located facing the filled through openings, with the use of a dielectric mask. After this, a second etch process simultaneously op

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