Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
1999-07-01
2002-12-24
Chaudhari, Chandra (Department: 2813)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S686000, C438S244000, C438S253000, C438S678000
Reexamination Certificate
active
06498094
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor device having a contact hole (connection hole) formed in an insulating film on a substrate. More particularly, the present invention relates to a semiconductor device having a semiconductor memory such as a DRAM or ferroelectric memory wherein a semiconductor element and a capacitor are electrically connected to each other via a plug within the contact hole and a manufacturing method therefor.
As recent semiconductor memory devices have increased in integration scale, attention has been given to technology for integrating, in a semiconductor substrate, a capacitor having a capacitor insulating film made of a dielectric with a dielectric constant of 30 or more (hereinafter referred to as a high dielectric), thereby providing a sufficient amount of charge accumulated in the capacitor used in a memory cell. Attention has also been given to a so-called ferroelectric memory using a ferroelectric in a capacitor insulating film as a nonvolatile memory operable with a low voltage at a high speed. As a high dielectric or ferroelectric, there has been used a dielectric material composed of a metal oxide such as Ta
2
O
5
, SrBi
2
Ta
2
O
9
, or Ba
x
Sr
1−x
TiO
3
(where x satisfies 0≦x≦1), so that the development of technology for integrating such a dielectric into a semiconductor substrate is essential to the implementation of a ferroelectric memory.
A description will be given to a conventional semiconductor memory device with reference to the drawings.
FIG. 9
shows a cross-sectional structure of the conventional semiconductor memory device. As shown in
FIG. 9
, a transistor
107
is formed in the region of a substrate
101
made of p-type silicon doped with a group III element which is isolated by an isolation film
102
. The transistor
107
is composed of: a gate electrode
104
made of polysilicon and formed on the substrate
101
via a gate insulating film
103
made of a silicon oxide (SiO
2
); a source region
106
; and a drain region
105
. Each of the source region
106
and drain region
105
is formed in an upper portion of the substrate
101
along the gate length of the gate electrode
104
and doped with a group V element.
A bit line
108
made of polysilicon is formed on the source region
106
. The transistor
107
and the bit line
108
are covered with a SiO
2
insulating film
109
. A contact hole
109
a
is formed in the region of the insulating film
109
overlying the drain region
105
and a plug
110
made of polysilicon is filled in the contact hole
109
a.
A capacitor
114
consisting of a lower electrode
111
made of platinum (Pt), a capacitor insulating film
112
made of SrBi
2
Ta
2
O
9
, and an upper electrode
113
made of platinum is formed on the insulating film
109
in such a manner as to cover the plug
110
. A barrier layer
115
for preventing platinum composing the lower electrode
111
from being diffused into the plug
110
is disposed between the lower electrode
111
and the plug
110
. An ohmic contact is made between the barrier layer
115
and the plug
110
.
After the semiconductor memory device is formed, an annealing process is normally performed with respect to the semiconductor memory device in an oxygen atmosphere such that the capacitor
114
excellently retains its properties. In the barrier layer
115
, therefore, there is used a nitride such as titanium nitride (TiN) or an oxide such as iridium oxide (IrO
2
) which is less likely to oxidize the surface of the plug
110
made of polysilicon and unreactive to polysilicon and platinum in the lower electrode
111
during the annealing process.
However, the conventional semiconductor memory device has the following problem. If titanium nitride is used in the barrier layer
115
, the barrier layer
115
is more likely to lose its conductivity because titanium nitride is oxidized by the annealing process, so that the electric connection between the transistor
107
and the capacitor
114
becomes insufficient.
If an oxide such as iridium oxide is used in the barrier layer
115
, the upper surface of the plug
110
is exposed to an oxygen plasma and oxidized during the formation of the barrier layer
115
, so that the plug
110
loses its conductivity and the electric connection between the transistor
107
and the capacitor
114
also becomes insufficient. In either case, the problem is encountered that the semiconductor memory device is likely to incur a faulty operation.
SUMMARY OF THE INVENTION
It is therefore an object of the present invention to solve the aforesaid conventional problem and impart high reliability to a contact hole for providing an electric connection between a semiconductor element formed in a substrate and another semiconductor element formed on an insulating film covering the semiconductor element.
To attain the object, the present invention uses a conductive film containing a platinum group element to compose a plug formed in the contact hole as a connection hole. In addition, the present invention provides a barrier layer made of a metal nitride between the substrate and the plug.
Specifically, a first semiconductor device according to the present invention comprises: a substrate formed with a semiconductor element; an insulating film formed on the substrate, the insulating film having a connection hole and covering the semiconductor element; an underlying conductive film formed in at least a lower portion of the connection hole and electrically connected to the semiconductor element; and a conductive film formed in an upper portion of the connection hole and containing a platinum group element.
In the first semiconductor device, each of the underlying conductive film formed in at least the lower portion of the connection hole and the conductive film formed in the upper portion of the connection hole contains a platinum group element, so that the underlying conductive film and the conductive film are not oxidized or, if oxidized, retain conductivity in an annealing process performed in an oxygen atmosphere during the manufacturing of the first semiconductor device. As a result, an excellent electric connection is maintained among the underlying conductive film, the conductive film, and the semiconductor element, which improves the reliability of the device.
In the first semiconductor device, the connection hole preferably has a depth equal to or larger than a minimum diameter of the connection hole. This increases the scale of integration of the semiconductor elements, since the aspect ratio of the connection hole is higher than 1.
Preferably, the first semiconductor device further comprises a dielectric film formed over the conductive film. In the arrangement, the conductive film contains a platinum group element so that the upper end of the conductive film as the plug is used as the lower electrode of the capacitor without any alteration. This allows the omission of the step of forming the lower electrode and reduces the size of the capacitor formed. If the dielectric film is made of a ferroelectric, a nonvolatile memory device can be implemented.
In the first semiconductor device, the conductive film preferably expands over the portion of the insulating film surrounding the connection hole and has a top surface higher in level than an upper end of the connection hole. In the arrangement, the upper end of the conductive film protrudes from the upper end of the connection hole, which renders the upper end of the conductive film more likely to be used as the lower electrode of the capacitor. If an electroplating method using the underlying conductive film as an electrode is used, the conductive film forming the plug can be formed promptly on the underlying conductive film.
In this case, the semiconductor device preferably further comprises a dielectric film formed over the conductive film. In the arrangement, if the upper end of the conductive film is used as the lower electrode of the capacitor, the dielectric film formed over the conductive film is used as the capacito
Judai Yuji
Nakao Keisaku
Noma Atsushi
Sasai Yoichi
Chaudhari Chandra
Nguyen Thanh
Nixon & Peabody LLP
Studebaker Donald R.
LandOfFree
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