Semiconductor device manufacturing: process – Semiconductor substrate dicing – Having specified scribe region structure
Reexamination Certificate
1999-04-09
2002-09-10
Weiss, Howard (Department: 2814)
Semiconductor device manufacturing: process
Semiconductor substrate dicing
Having specified scribe region structure
C438S975000, C451S028000, C451S177000
Reexamination Certificate
active
06448154
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to a method producing wafers with rounded corners in the notch used for alignment for use in the fabrication of semiconductor devices and a tool for producing such wafers.
2. Brief Description of the Prior Art
The fabrication of semiconductor devices generally starts with a slice or wafer of semiconductor material on which the semiconductor devices are fabricated. Such wafers are generally thin in width and have a pair of surfaces with the corners at the perimeter of the wafer generally being rounded.
In order to properly align the semiconductor wafers in processing equipment during the fabrication of semiconductor devices on the wafers, it has been necessary to provide a physical indication on the wafer to assist in such wafer alignment. The general such physical indication in the prior art has been formation of a flat end portion on the otherwise circular wafer with this indication more recently having been changed to a triangularly-shaped or parabolically-shaped notch at the wafer perimeter. A problem with these forms of wafer alignment is that the flat or notch regions used for alignment generally have sharp corners, particularly in the case where notches are used. These sharp corners generate particles during handling which can have deleterious effects during subsequent processing operations. In addition, damage from sharp corners may propagate into the wafer during device fabrication, causing eventual breakage and yield diminution.
It has also been determined that there is often a thick resist buildup at the sharp corner made between the notch and the perimeter of the wafer which is difficult to remove by ashing and chemical treatment. To date, it has not been appreciated that the sharp edges or corners located in the notch contribute to the above problems and it is not known that there has been any attempt in the prior art to remove the sharp corners from the notch and the regions connected to the notch.
SUMMARY OF THE INVENTION
In accordance with the present invention, the above described problems of the prior art wafer and particularly such wafer using a notch for alignment are minimized and there is provided a method of fabricating semiconductor devices on a wafer having a notch for alignment and tools for effecting such method for minimization of the above described problem and rounding of the junction of the notch and wafer perimeter as well as the notch apex and edges of the notch running from the wafer perimeter to the notch apex.
Briefly, there are provided one or more tools in the form of a grinding wheel or belt which rounds all sharp edges or corners existing in the notch either when forming the notch or when altering the shape of an already existing notch to eliminate all sharp corners both at the apex of the notch as well as along all intersections of the walls of the notch with the planar wafer surface and also with the perimeter of the wafer. Conventional stress relief etching in hydrogen fluoride plus nitric acid plus phosphoric acid or other suitable acidic solutions enhances notch corner rounding. In such a solution, rounding occurs as a normal consequence of etching both the top and side surfaces, the corners etching faster by virtue of being exposed to a greater volume of etchant. A wafer having a notch with rounded corners reduces the likelihood of edge damage during wafer handling due to flat finding, wafer centering, etc., prevents thick resist buildup at corners of the notch during photolithography, eliminates particle contamination from resist buildup at sharp notch corners and reduces ash time required to remove thick resist buildup.
The grinding tool provided in accordance with the present invention has a rounded front end somewhat in the shape of half of a paraboloid. The tool is formed of a material which is harder than the material of which the wafer is made. Generally, the grinding surface of the tool is fabricated from diamond with an approximate 800 mesh grit. The tool also includes one or more wing portions extending outwardly from the paraboloid surface and set back from the tool front tip a distance generally equal to the ultimate depth of the notch from the wafer perimeter. The wing is tapered in the direction toward the tool front tip. In the case of a single wing, such wing can extend completely around the entire tool or can extend only partially around the tool. The tool is rotated it axis which is the major axis of the paraboloid and moved against the edge of the wafer in a direction along a radius of the wafer either in a predetermined location on the wafer edge or into a previously formed notch in the wafer perimeter. The tool will grind away the wafer to form a notch until the wing or wings contact the perimeter of the wafer. At that point, the tool will grind the corner made between the notch and the wafer perimeter into the shape of the round on the tool between the paraboloid portion of the tool and the wing portion of the tool, this being rounded. A second grind step is optionally provided at this time using an identically shaped wheel with finer grit size to remove surface damage, if desired. A third grind step may be provided in order to round the top edge of the wafer along the intersection of the edge of Th. notch with the top and/or bottom planar surfaces of the wafer. Examples are grinding this surface using a cylindrical grinding wheel rotating against the edge or using a long belt with diamond grit on its interior surface that revolves about an axis parallel to the top wafer surface. The tool is then removed with the wafer now ready for processing in standard manner.
REFERENCES:
patent: 4905425 (1990-03-01), Sekigawa et al.
patent: 4984392 (1991-01-01), Sekigawa et al.
patent: 5185965 (1993-02-01), Ozaki
patent: 5289661 (1994-03-01), Jones et al.
patent: 5445554 (1995-08-01), Hosokawa
patent: 5458529 (1995-10-01), Hasegawa et al.
Garvin, Jr. James F.
Guldi Richard L.
Mukerjee-Roy Moitreyee
Brandy III Wade James
Pizarro-Crespo Marcos D.
Telecky , Jr. Frederick J.
Texas Instruments Incorporated
Weiss Howard
LandOfFree
Method for producing wafers with rounded corners in the... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method for producing wafers with rounded corners in the..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for producing wafers with rounded corners in the... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2893757