Method for producing sublithographic etching masks

Details Method for producing sublithographic etching masks Method for producing sublithographic etching masks

1996-07-17

1999-06-29

Nuzzolillo, Mark

Semiconductor device manufacturing: process

Chemical etching

Combined with coating step

438735, 438736, 438737, 438947, 216 46, H01L 21312

Patent

active

059168218

ABSTRACT:
A method for producing sublithographic etching masks for creating structured features in semiconductor products having a large scale of integration, includes applying lines that are orthogonal to one another in successive steps with the aid of the spacer technique. Through the use of various etching steps, a grid of extremely small etching masks is obtained, which is formed by the intersection points of the lines. The size of the etching masks is determined by the layer thickness of the spacer layer, and not by the feature or structure size of the photographic technique.

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IBM Technical Disclosure Bulletin , vol. 26, No. 9, Feb. 1984, pp. 4587-4589, (Johnson, Jr. et al.) "Method for making submicron dimension in using sidewall image transfer techniques"; and.
IEEE Electron Device Letters, vol. 14, No. 8, Aug. 1993, pp. 415-417, (Pein et al.) "A 3-D Sidewall Flash EPROM Cell and Memory Array".

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