Method for producing semiconductor device having alignment mark

Details Method for producing semiconductor device having alignment mark Method for producing semiconductor device having alignment mark

1995-09-29

1997-09-02

Maples, John S.

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

438675, 438681, 438975, H01L 21441

Patent

active

056630999

ABSTRACT:
An alignment method for a semiconductor device having a conductive thin film on a conductive substrate surface across an insulation film, comprises steps of: forming in the insulation film, at least two apertures exposing the substrate surface therein; selectively depositing a conductive material in the apertures thereby forming a stepped portion in at least one of said apertures; and forming the conductive thin film at least on said insulation film. The alignment is conducted utilizing the stepped portion.

REFERENCES:
patent: 4630357 (1986-12-01), Rogers et al.
patent: 4641420 (1987-02-01), Lee
patent: 5083364 (1992-01-01), Olbrich et al.
patent: 5179042 (1993-01-01), Mikoshiba et al.
patent: 5192680 (1993-03-01), Naruse et al.
Patent Abstracts of Japan, vol. 8, No. 142, English Abstract of Japanese Patent No. 59 052 867, Jul. 3, 1992.
"Alignment Aid for Stud Up Technology", Research Disclosure, No. 303, p. 494, Jul. 1989.
"Multilevel Metal Direct Writer Resignation", E. Berndlmaier, et al., IBM Technical Disclosure Bulletin, vol. 24, No. 7B, pp. 3852-3853, Dec., 1981.
Research Disclosure No. 30327, "Alignment for Stud Up Technology" Jul., 1989.

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