Method for producing epitaxial silicon germanium layers

Semiconductor device manufacturing: process – Formation of semiconductive active region on any substrate

Reexamination Certificate

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C438S796000

Reexamination Certificate

active

06313016

ABSTRACT:

Priority is claimed herein with respect to Application No. 198 59 429.1 filed in the German Patent Office on Dec. 22, 1998, the disclosure of which is incorporated herein by reference.
BACKGROUND OF THE INVENTION
The present invention relates to a method for producing lattice-adapted or relaxed silicon germanium layers on a semiconductor substrate by an epitaxy process, particularly the molecular beam epitaxy, with a hydrogen source. The present invention additionally relates to a layer sequence produced according to the method of the invention.
Many high-frequency components that are based on the SiGe/Si material system require a substrate, for which the lattice constant can be adapted to be between that of pure silicon and that of pure germanium. The lattice misfit of this material system is 2.4% for pure geranium, relative to the Si. If a mixed crystal layer with the composition Si
1−x
Ge
x
(wherein x indicates the share of germanium) is deposited epitaxially and mono-crystalline on a silicon substrate, an elastic strain initially occurs in the growing Si
1−x
Ge
x
layer (see
FIG. 1
a
). After the so-called critical layer thickness has been exceeded, this elastic strain is reduced through the formation of misfit dislocations, preferably near the boundary layer (see
FIG. 1
b
). The critical layer thickness depends on the germanium concentration x and the growth temperature. The misfit dislocations, which occur parallel to the boundary layer, are accompanied by a high number of dislocations, found within the Si
1−x
Ge
x
buffer layer extending from the boundary layer SiGe/Si (interface) to the surface of the epitaxial layer (FIG.
2
). The thread-type dislocations, which in the
FIG. 2
extend to the surface and are referred to in scientific usage as “threading” dislocations, interfere with the function of active component layers and should therefore be suppressed if possible.
Such high-quality mono-crystalline, lattice-adapted SiGe layers are realized as follows in the form of synthetic substrates on a standard silicon substrate by molecular beam epitaxy or by means of precipitation from a reactive gas phase in a chemical vapor deposition method (CVD method), depending on the layer thickness:
a) With thick buffers in the layer thickness range of more than 1 &mgr;m, the germanium content increases continuously or in stages during the growth, wherein a germanium content increase of, for example, 10% per &mgr;m SiGe layer thickness is used as a basis. As a rule, the growth temperature is reduced to suppress the three-dimensional growth with increasing germanium.
With this solution, the lattice adaptation between the silicon substrate and the growing SiGe layer occurs through strain-driven adaptation dislocations in the growing SiGe layer during the growth period (F. Schäffler, Semicond. Sci. Technol. 12, 1515 (1997) and T. Hackbarth, H. Kibbel, M. Glueck, G. Hoeck, H.-J. Herzog, Thin Solid Films, 321 (1998), 136-140).
The disadvantage of this method is that the final germanium concentration required for the SiGe layer that functions as a buffer layer for electronic components can be achieved only with a particularly high layer thickness. As a result of the layer thickness, height differences result on a common wafer, e.g., with silicon components, which are irreconcilable with modern integration technology or at least cause difficulties during the up-integration.
Furthermore, the surface topography of these thick SiGe buffer layers, which are grown at high temperatures, already has disadvantages for the subsequently applied structures with thin individual films since the faults in the surface structure can have a dimension that is vertically comparable to the active component layers.
b) For thin buffer layers in the layer thickness range of less than 1 &mgr;m, a strained non-lattice adapted SiGe buffer layer with constant or even graded germanium content is deposited epitaxially. This layer is subsequently implanted with hydrogen atoms and is relaxed through a subsequent tempering process with protective gas. The hydrogen dose and energy are selected such that a maximum hydrogen concentration is still located inside the silicon substrate, but relatively close to the boundary layer to the SiGe buffer layer. The subsequent tempering process takes place at temperatures in the range of 800° C. and leads to a lattice adaptation through adaptation dislocations, which extend primarily in the thin silicon layer between the boundary layer and the maximum hydrogen concentration (S. Mantl, B. Holländer, R. Liedke, 5. Mesters, H.-J. Herzog, H. Kibbel, T. Hackbarth, “Thin Solid Films,” presently in print, published by EMRS, Strassburg, 1998).
This solution has disadvantages because it requires an implantation with relatively high energies that normally occurs outside of the epitaxy arrangement—ex situ—in connection with a subsequent tempering process for relaxation. The actual component structure can be allowed to grow only after that on the relaxed SiGe layer. The wafer transfer that follows the 1
st
epitaxy stage for implantation and tempering, which implantation and tampering takes place outside of the epitaxy arrangement, makes it more difficult to continue the subsequent epitaxy because it requires a new pre-preparation of the wafer. Furthermore, the implantation of hydrogen involves the danger of crystal damage on the surface or in the volume. This damage cannot be healed by the relaxation of the SiGe buffer layer through a thermal treatment because the implanted hydrogen in the process is also thinned through diffusion in the volume and loses its relaxation-supporting property.
If the necessary final germanium concentration additionally cannot be achieved in a sequence of steps involving epitaxy, H-implantation and tempering, the aforementioned procedure would have to be carried out in several stages. Owing to the fact that a multiple pre-preparation is necessary, this would hurt the crystal quality.
Furthermore, considerably higher temperatures are needed for relaxation, which, in combination with the hydrogen that is present, can lead to a higher diffusion in already existing component structures. The required implantation arrangement is also very expensive, owing to the complexity of such arrangements.
In addition to the molecular beam epitaxy, a precipitation of epitaxial layers from a chemically reactive gas (CVD method) is standard and is widely used because of its economic advantages. However, the precipitation of layers by means of CVD generally does not provide the variability in the process control, which would be necessary in the limit regions of kinetically controlled surface reactions in order to achieve an especially good layer quality. For the most part, this method necessitates operating at an undesirable and much higher temperature range.
A method for cleaning the surface of a semiconductor material by using hydrogen-containing plasma is known from the references EP 0 746 011 A2 and EP 0 493 278 A1. With this method, a natural oxidation layer on a silicon substrate is removed prior to a depositing process. The silicon surface cleaned in this way is then covered with an essentially mono-atomic hydrogen coating. Normally, the temperatures for the cleaning process as well as the subsequent layer deposit are in the range of approximately 800 ° C., sometimes even in the range of 1000° C. and above. As a result of such high temperatures and the kinetic reaction of the gaseous phase with the substrate surface, a more or less closed hydrogen surface is always replaced in a chemical reaction with the layer-forming species during the layer-depositing stage. The growth then continues with the newly forming layer surface.
However, given such growth conditions, it appears to be nearly impossible with respect to process technology to purposely introduce hydrogen to a very limited region of a layer surface.
Therefore, it is the object of the present invention to provide a layer sequence, as well as a method of producing this layer sequence, which makes it pos

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