Semiconductor device manufacturing: process – Radiation or energy treatment modifying properties of...
Reexamination Certificate
2000-09-14
2003-10-21
Smith, Matthew (Department: 2825)
Semiconductor device manufacturing: process
Radiation or energy treatment modifying properties of...
C438S308000, C438S471000, C438S797000, C438S800000
Reexamination Certificate
active
06635587
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention generally relates to the preparation of semiconductor material substrates, especially silicon wafers, which are used in the manufacture of electronic components. More particularly, the present invention relates to a heat treatment process for annihilating B-type silicon self-interstitial agglomerated defects in single crystal silicon.
Single crystal silicon, which is the starting material for most processes for the fabrication of semiconductor electronic components, is commonly prepared by the so-called Czochralski (“Cz”) method. In this method, polycrystalline silicon (“polysilicon”) is charged to a crucible and melted, a seed crystal is brought into contact with the molten silicon, and then a single crystal is grown by slow extraction. After formation of a neck is complete, the diameter of the crystal is enlarged by decreasing the pulling rate and/or the melt temperature until the desired or target diameter is reached. The cylindrical main body of the crystal which has an approximately constant diameter is then grown by controlling the pull rate and the melt temperature while compensating for the decreasing melt level. Near the end of the growth process, but before the crucible is emptied of molten silicon, the crystal diameter must be reduced gradually to form an end-cone. Typically, the end-cone is formed by increasing the crystal pull rate and heat supplied to the crucible. When the diameter becomes small enough, the crystal is then separated from the melt.
In recent years, it has been recognized that a number of defects in single crystal silicon form in the crystal growth chamber as the crystal cools after solidification. Such defects arise, in part, due to the presence of an excess (i.e., a concentration above the solubility limit) of intrinsic point defects, which are known as silicon lattice vacancies and silicon self-interstitials. It is understood that the type and initial concentration of these point defects in the silicon, which become fixed at the time of solidification, are controlled by the conditions under which the single crystal silicon ingot is grown. (See, e.g., PCT/US98/07365 and PCT/US98/07304.) If the concentration of such point defects reaches a level of critical supersaturation within the single crystal silicon, and if the mobility of the point defects is sufficiently high, a reaction, or an agglomeration event, will likely occur.
Vacancy-type defects are recognized to be the origin of such observable crystal defects as D-defects, Flow Pattern Defects (FPDs), Gate Oxide Integrity (GOI) Defects, Crystal Originated Particle (COP) Defects, crystal originated Light Point Defects (LPDs), as well as certain classes of bulk defects observed by infrared light scattering techniques, such as Scanning Infrared Microscopy and Laser Scanning Tomography. Also present in regions of excess vacancies are defects which act as the nuclei for ring oxidation induced stacking faults (OISF). It is speculated that this particular defect is a high temperature nucleated oxygen agglomerate catalyzed by the presence of excess vacancies.
Defects relating to self-interstitials are less well studied, however, two types of self-interstitial defects have been observed and are commonly referred to as A-defects and B-defects (or A- and B- “swirls” or “clusters”). A-defects are larger and more easily detected by means common in the art, as compared to B-defects. A-defects are generally regarded as being low densities of interstitial-type dislocation loops or networks. Less is known about B-defects, primarily because they are much smaller in size and also because, until recently, methods for easily and reliably detecting such defects have not existed. However, at least some believe that B-defects are not dislocation loops but rather are loosely packed three-dimensional agglomerates of silicon self-interstitials and impurity atoms of some kind. (See, e.g., F. Shimura,
Semiconductor Silicon Crystal Technology
, Academic Press, Inc., San Diego Calif. (1989) at pages 282-284 and the references cited therein.)
Although A- and B-defects are not believed to be responsible for gate oxide integrity failures, an important wafer performance criterion, A-defects at least are widely recognized to be the cause of other types of device failures usually associated with current leakage problems. Less is known about the problems associated with B-defects. However, as device technology continues to improve, thus enabling the preparation of even smaller integrated circuitry, these smaller interstitial defects will naturally become the focus of greater concern. Accordingly, a need continues to exist for the means by which to prepare silicon wafers which are free of both A-type and B-type agglomerated interstitial defects.
SUMMARY OF THE INVENTION
Among the several objects and features of the present invention may be noted the provision of a process of annihilating B-defects from single crystal silicon; the provision of a process for producing a single crystal silicon wafer which is substantially free of B-defects; the provision of a process wherein a silicon wafer substantially free of A-defects is rendered substantially free of B-defects; the provision of a single crystal silicon wafer substantially free of both A- and B-defects; and, the provision of a process for producing an ideal precipitating single crystal silicon wafer which is substantially free of B-defects.
Briefly, therefore, the present invention is directed to a process for heat treating a silicon wafer to dissolve B-defects present therein. The process comprises subjecting the wafer to a B-defect dissolution heat-treatment, wherein the wafer temperature is increased through a range of temperatures at which B-defects can grow and can become stabilized, at a heating rate sufficient to prevent the stabilization of the B-defects to a heat-treatment temperature of at least about 1000° C. and maintaining the wafer at the heat-treatment temperature for a time period sufficient to dissolve the B-defects.
The present invention is further directed to a process for heat-treating a single crystal silicon wafer to dissolve B-defects and to influence the precipitation behavior of oxygen in the wafer in a subsequent thermal processing step. The process comprises subjecting the wafer to a B-defect dissolution heat-treatment, wherein the wafer temperature is increased through a range of temperatures at which B-defects can grow and can become stabilized, at a heating rate sufficient to prevent the stabilization of the B-defects to a heat-treatment temperature of at least about 1000° C. Then maintaining the wafer at the heat-treatment temperature for a time period sufficient to dissolve the B-defects and controlling the cooling rate of the heat-treated wafer to cause the formation of a vacancy concentration profile in the wafer, in which the peak density is at or near the central plane with the concentration generally decreasing in the direction of the front surface of the wafer and the difference in the concentration of vacancies in the front surface and bulk layers being such that a thermal treatment at a temperature in excess of 750° C., is capable of forming in the wafer a denuded zone in the front surface layer and oxygen clusters or precipitates in the bulk layer with the concentration of the oxygen clusters or precipitates in the bulk layer being primarily dependant upon the concentration of vacancies.
Other objects and features of this invention will be in part apparent and in part pointed out hereinafter.
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Holzer Joseph C.
Libbert Jeffrey L.
Mule'Stagno Luciano
MEMC Electronic Materials , Inc.
Rocchegiani Renzo N.
Senniger Powers Leavitt & Roedel
Smith Matthew
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