Method for producing a three-dimensional circuit arrangement

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer

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Details

438455, 438458, H01L 2100

Patent

active

059435631

DESCRIPTION:

BRIEF SUMMARY
BACKGROUND OF THE INVENTION

Three-dimensional circuit arrangements are implemented as a component stack for cubic integration. Individual components are stacked one above the other in a component stack, and are firmly connected to one another. In this case, the individual components in each case comprise integrated circuits, sensor-actuator arrangements and/or passive components. The individual components can in this case be produced using different technologies. The various components are electrically connected to one another, one above the other, by vertical contacts.
During the production of such a three-dimensional circuit arrangement, the components are first of all produced in a conventional manner in a substrate. There are then in principle two options for joining the component stack together. On the one hand, the components can all first of all be separated and then joined together to form the stack. As a rule, this is done such that a substrate which comprises a further component to be added to the stack is bonded by the front side onto a robust mount. The substrate is thinned to about 10 .mu.m from the rear side. The substrate is then separated into the individual components. The separate component is then placed onto a component or a component stack. The fitted component is mechanically and electrically connected to the component or the component stack. The component stack formed in this way is detached from the mount and is connected to further components in an analogous manner.
On the other hand, the substrate, which comprises a component which is to be added to a stack, is not separated until after mechanical attachment. To this end, the substrate is bonded by the front side onto a mount and is thinned from the rear side. The component or the component stack is then placed upside-down onto the substrate and is mechanically and electrically connected to it. The separation into individual component stacks does not take place until then.
The separation of substrates into individual components is carried out in microelectronics by sawing. In the case of the first method, the sawing of the substrate is carried out immediately before the components are fitted. Contamination, which is produced during sawing of the substrate, must be removed from the surface of the components before mechanical connection.
If the components are mechanically connected to one another with the aid of an adhesive, then, as a rule, the adhesive is applied before separation. After cleaning contamination which has been produced during sawing, the surface of the adhesive must then be reactivated.
Furthermore, the mount must also be split during separation of the substrate. The material of the mount must therefore be selected such that it can be separated using the same saw as the thinned substrate wafer. Furthermore, in this case, the mount is destroyed when each component level is added.
In the case of the second method, the separation of the substrate is not carried out until after the mechanical connection to the component stack which is to be added to. The mount must likewise be split in this case when the substrate is split. The material for the mount must therefore likewise be matched to the substrate material. Since component stacks are in this case arranged on the substrate which are each composed of thinned layers and are highly susceptible to fracture, it is necessary to avoid the saw touching the edge of the stack. During each step, it is therefore necessary to maintain a minimum distance between the saw edge and the stack edge. In consequence, the space utilization on the substrate and thus the material utilization of the substrate and of the mount are limited. A new mount must also be used in this case for each component level to be added, since this mount is split up during separation.


SUMMARY OF THE INVENTION

The invention is based on the problem of specifying a further method for producing a three-dimensional circuit arrangement, in which fragmentation of thinned substrate wafers is avoided. In particular,

REFERENCES:
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patent: 4983251 (1991-01-01), Haisma et al.
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Japanese Journal of Applied Physics, vol. 23, No. 10, Oct. 1984, Tokyo, T. Hamaguchi et al., Device Layer Transfer Technique Using Chemi-Mechanical Polishing, pp. L815-L817.

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