Method for producing a coating layer for semiconductor technolog

Adhesive bonding and miscellaneous chemical manufacture – Delaminating processes adapted for specified product – Delaminating in preparation for post processing recycling step

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156644, 156646, 156655, 156657, 1566591, 156668, 20419237, 252 791, 437157, 437228, 437238, B44C 122, C03C 1500, C03C 2506

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047642491

ABSTRACT:
A coating layer (2) for semiconductor technology having an edge contour which has a wedge-shaped cross section is produced by predominantly anisotropic dry etching of the coating layer (2) through a mask (4) disposed in front of the coating layer (2) at a finite mask distance (A).
The coating layer (2) etched in this manner is especially well suited as an insulating substrate for a field plate in the edge region of a P-N junction emerging at the surface and also as implantation mask for producing a P-N junction with lateral doping gradients.

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patent: 4484978 (1984-11-01), Keyser
patent: 4661203 (1987-04-01), Smith et al.
Rothman et al., "Process for Forming Tapered Vias in SiO.sub.2 by Reactive Ion Etching", Extended Abstracts, vol. 80-1 (1980 May), Abstract No. 110, pp. 289-290.
Koste et al., "Via Profiling by Plasma Etching with Varying Ion Energy", IBM Technical Disclosure Bulletin, vol. 22, No. 7, Dec. 1979, pp. 2737-2738.
Tove, "Methods of Avoiding Edge Effects on Semiconductor Diodes", Review Article, J. Phys. D: Appl. Phys., 15(1982), pp. 517-536.
Tihanyi, "Integrated Power Devices", IEDM-82, pp. 6-10.
Stengl et al., "Variation of Lateral Doping-A New Concept to Avoid High Voltage Breakdown of Planar Junctions", IEDM-85, pp. 154-157.
Ephrath, "Dry Etching for VLSI-A Review", J. Electrochem. Soc.: Reviews and News, Mar. 1982, vol. 129, No. 3, pp. 62C-65C.

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