Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2006-01-10
2006-01-10
Padmanabhan, Mano (Department: 2188)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C711S122000, C711S150000, C711S152000, C711S163000
Reexamination Certificate
active
06986003
ABSTRACT:
Multi-processor computer systems with multiple levels of cache memories are slowed down in trying to process software locks for common functions. This invention obviates the problem for the vast majority of transactions by providing an alternate procedure for handling so-called communal locks differently from ordinary software locks. The alternative procedure is not used for ordinary (non communal software lock) data and instruction transfers. The function of the CSWL (Communal SoftWare Lock) is actually accomplished at a specific cache to which an individual CSWL is mapped to, rather than sending the lock to the requesting process, which also enhances efficiency.
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Final Rejection of S/N 09/925,592 mailed Jun. 9, 2004.
Sipple Ralph E.
Ward Wayne D.
Inoa Midys
Johnson Charles A.
Padmanabhan Mano
Rode Lise A.
Starr Mark T.
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