Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Patent
1996-09-30
1998-09-22
Everhart, Caridad
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
438631, 438637, 438649, 438657, H01L 2144
Patent
active
058113541
ABSTRACT:
The present invention provides a method for preventing a polycide line situated between two poly-metal dielectric layers from drifting or deformation during a reflow process conducted for the dielectric layers by forming a dummy polycide gate and a dummy contact at a suitable location in the polycide line such that the dummy contact is anchored through the bottom dielectric layer to a dummy gate located on a field oxide isolation in the silicon substrate. The number of dummy contacts and the location for placing such contacts are determined by the length and the configuration of the polycide line and the topography of the dielectric layer that the polycide line is situated on.
REFERENCES:
patent: 4949162 (1990-08-01), Tamaki et al.
patent: 5436411 (1995-07-01), Pasch
patent: 5556805 (1996-09-01), Tanizawa et al.
Everhart Caridad
Taiwan Semiconductor Manufacturing Co. Ltd.
LandOfFree
Method for preventing polycide line drift by incorporating dummy does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method for preventing polycide line drift by incorporating dummy, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for preventing polycide line drift by incorporating dummy will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1621575