Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2000-06-01
2001-12-25
Bowers, Charles (Department: 2813)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S637000, C438S653000, C257S761000
Reexamination Certificate
active
06333261
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method for preventing aluminum intrusions into a via hole on a semiconductor wafer.
2. Description of the Prior Art
With the increasing complexity of integrated circuits, the surface of the semiconductor wafer cannot provide enough area to form circuit interconnects. In order to form interconnects on this decreasing MOS transistor scale, a multilevel interconnect process is the typical method used in an integrated circuit. In the multilevel interconnects process, a plug is used to electrically connect two conductive layers. Transistors on the wafer connect to each other via the plug so as to form an entire circuit.
Aluminum is usually used as the conductive material in a metallization process because of its good conductive properties, and because it is easy to deposit using a sputtering process. In a typical method for forming a plug, an etching process is performed to form a via hole in a dielectric layer, and a chemical vapor deposition (CVD) process is used to fill tungsten into the via hole so as to form the plug.
Please refer to
FIG. 1
to FIG.
3
.
FIG. 1
to
FIG. 3
are schematic diagrams of the prior art method for forming a via plug
30
. As shown in
FIG. 1
, a prior art semiconductor wafer
10
includes a substrate
12
, an aluminum layer
14
on the substrate
12
, an anti-reflection coating (ARC)
16
on the aluminum layer
14
, a dielectric layer
18
on the ARC
16
, and a via hole
20
that passes through the dielectric layer
18
and the ARC
16
down to a predetermined depth within the aluminum layer
14
. In the prior art method, a thin film deposition process is performed on the semiconductor wafer
10
using a physical vapor deposition (PVD) method. Either a collimator sputtering process, or an ionized metal process, can be used to form a titanium layer
22
on the bottom and on the walls of the via hole
20
. Because titanium is good at oxygen gettering, and an ohmic contact at the interface between titanium and silicon can be approached easily at a proper temperature, titanium is usually used in a contact process. However, the titanium layer
22
is limited by the poor step coverage properties of the sputtering process, so the titanium layer
22
that covers the fringe portions of the bottom of the via hole
20
is very thin.
As shown in
FIG. 2
, the semiconductor wafer
10
is then placed into a chamber that is pre-heated to 400° C. to 450° C. (752° F. to 842° F.). However, aluminum
14
melts and intrudes into the via hole
20
due to the high temperatures of the CVD process. As shown in
FIG. 3
, a CVD process then forms a titanium nitride layer (TiN)
26
on the surface of the titanium layer
22
and the intrusion aluminum layer
24
. The titanium layer
26
is used as a barrier layer to prevent spiking phenomenon at the aluminum/silicon interface, and it also enhances the adhesion of the tungsten. A CVD process is then performed to form a blanket tungsten layer that fills the via hole
20
. A tungsten etch back process is performed using a dry etching process to remove the tungsten layer that covers the surface of the dielectric layer
18
. The tungsten layer
28
remaining in the via hole
20
forms the via plug
30
.
In the prior art method, the chamber is pre-heated before performing the CVD process to deposit the titanium nitride layer
22
. The pre-heat temperature helps a subsequent CVD process perform more smoothly. However, the pre-heat temperature is about 400° C. to 450° C. (752° F. to 842° F.), and the melting point of aluminum is lower, about 380° C. (716° F.). Hence, the high temperature of the pre-heat process causes the aluminum to melt and intrude into the via hole
20
from the thin portions of the titanium layer
22
. The aluminum layer
24
intruding into the via hole
20
reacts with the titanium layer
22
and forms aluminum titanium (AlTi
3
) at the interface. The presence of aluminum titanium results in an increased electrical resistance of the via plug
30
, up to 10&OHgr;to 20&OHgr;. Furthermore, it can effect the reliability of the circuit.
SUMMARY OF THE INVENTION
It is therefore a primary objective of the present invention to provide a method for preventing aluminum intrusion in a via hole on a semiconductor wafer so as to solve the above mentioned problems.
In an preferred embodiment of the present invention, the semiconductor wafer includes a substrate, an aluminum layer on the substrate, an anti-reflection coating on the aluminum layer, a dielectric layer on the anti-reflection coating, and a via hole that passes through the dielectric layer and the anti-reflection coating down to a predetermined depth within the aluminum layer. In the present invention method, a titanium layer is formed on the bottom and on the walls of the via hole using a sputtering method. A physical vapor deposition process is then performed at a temperature of about room temperature to 350° C. (662° F.) to form a first titanium nitride layer on the titanium layer. The first titanium nitride layer has a thickness of 10 to 1000 angstroms. A chemical vapor deposition process is performed to form a second titanium nitride layer on the first titanium nitride layer. A tungsten plug is then formed in the via hole.
It is an advantage of the present invention that a low temperature PVD process is performed to deposit a titanium nitride layer before forming the CVD titanium nitride layer so as to prevent aluminum from intruding into the via hole during the high temperatures of pre-heat of the CVD process.
These and other objectives of the present invention will no doubt become obvious to those of ordinary skill in the art after reading the following detailed description of the preferred embodiment, which is illustrated in the various figures and drawings.
REFERENCES:
patent: 5780356 (1998-07-01), Kim
patent: 5833817 (1998-11-01), Tsai et al.
patent: 5911857 (1999-06-01), Kim
patent: 6043148 (2000-03-01), Peng et al.
patent: 6107190 (2000-08-01), Taguwa et al.
patent: 6121132 (2000-09-01), Lin et al.
patent: 6265305, 20010700
patent: 6277729 (2001-08-01), Wu et al.
patent: 70445553 (1993-07-01), None
patent: 10022390 (1998-01-01), None
patent: 414811 (2000-12-01), None
Huang Jyh-J
Lin Chi-Jung
Lu Horng-Bor
Wu Kun-Lin
Blum David S
Bowers Charles
Hsu Winston
United Microelectronics Corp.
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