Method for preloading data in a CPU pipeline

Electrical computers and digital processing systems: processing – Processing control – Processing control for data transfer

Reexamination Certificate

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C712S207000, C712S219000

Reexamination Certificate

active

07730289

ABSTRACT:
A method for preloading data in a CPU pipeline is provided, which includes the following steps. When a hint instruction is executed, allocate and initiate an entry in a preload table. When a load instruction is fetched, load a piece of data from a memory into the entry according to the entry. When a use instruction which uses the data loaded by the load instruction is executed, forward the data for the use instruction from the entry instead of from the memory. When the load instruction is executed, update the entry according to the load instruction.

REFERENCES:
patent: 6950925 (2005-09-01), Sander et al.
patent: 7024537 (2006-04-01), Pickett et al.
patent: 7089400 (2006-08-01), Pickett et al.
patent: 7500061 (2009-03-01), Maeda et al.
Chen et al., “An Efficient Architecture for Loop Based Data Preloading”, 1992.

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