Method for preconditioning a nonvolatile memory array

Details Method for preconditioning a nonvolatile memory array Method for preconditioning a nonvolatile memory array

1994-06-27

1996-07-16

Nelms, David C.

Static information storage and retrieval

Read/write circuit

Erase

36518522, 36518529, G11C 702

Patent

active

055373577

ABSTRACT:
A method of preconditioning a nonvolatile memory array including a first memory cell and a second memory cell. Preconditioning begins by applying an initial precondition pulse to all memory cells in the nonvolatile memory array without pausing to perform precondition verification. After this first step, precondition verification begins. The voltage level of the first memory cell is sensed and compared to a selected voltage level. If the threshold voltage of the first memory cell is below the selected voltage, the first memory cell did not precondition verify. In that case, another precondition pulse is then applied to the first memory cell. Application of precondition pulses and precondition verification continues until the first memory cell verifies as preconditioned. Attention turns to the second memory cell after the first memory cell precondition verifies. If the second memory cell does not precondition verify another precondition pulse is applied to the second memory cell. Application of precondition pulses and precondition verification continues until the second memory cell verifies as preconditioned.

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