Method for planarizing the surface of an interlayer insulating f

Adhesive bonding and miscellaneous chemical manufacture – Delaminating processes adapted for specified product – Delaminating in preparation for post processing recycling step

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29591, 156646, 156653, 156657, 1566591, 156668, 20419232, 357 71, 427 38, 427 88, 427 93, B44C 122, C03C 1500, C03C 2506, B29C 1708

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046344969

ABSTRACT:
A method for planarizing the surface of an insulation layer deposited on a first interconnection layer to allow a second interconnection layer deposited thereon without causing a breakage of the second interconnection layer. This method is characterized in that at least two insulation films, different in etching characteristics each other, are first formed on the first interconnection layer, and then a resist layer is deposited on the second insulating film. Subsequently, a portion of the resist layer is etched to expose the top surface of the second insulating film, and the second insulating film is selectively and anisotropically etched using the remaining resist layer as a mask. After removing the first insulating film and the remaining resist mark, a third insulating film is deposited to a thickness sufficient to make flat the surface thereof.

REFERENCES:
patent: 4478679 (1984-10-01), Chang et al.
patent: 4511430 (1985-04-01), Chen et al.
patent: 4523975 (1985-06-01), Groves et al.
patent: 4545852 (1985-10-01), Barton
Adams et al., "Planarization of Phosphorus-Doped Silicon Dioxide", J. Electrochem. Soc.: Solid-State Science and Technology, vol. 128, No. 2.
M. Inoue et al., "Smooting Technique by Etching Back," Semiconductor World, Oct. 1984.

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