Method for planarizing metal interconnects

Semiconductor device manufacturing: process – Chemical etching – Combined with the removal of material by nonchemical means

Reexamination Certificate

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C438S692000, C438S693000, C438S694000, C438S697000, C438S700000

Reexamination Certificate

active

06936541

ABSTRACT:
A method for planarizing metal interconnects of a semiconductor wafer includes the steps of polishing the semiconductor wafer with a polishing solution and a polishing pad to planarize the metal interconnects. The polishing solution has by weight percent, 0.15 to 5 benzotriazole, 0 to 1 abrasive, 0 to 10 polymeric particles, 0 to 5 polymer-coated particles and balance water at a pH of less than 5 and a removal rate-pressure sensitivity (dr/dp) of at least 750 (Å/min/psi). The polishing simultaneously accelerates removal of projecting metal from the metal interconnects with the polishing pad providing a first pressure that increases removal rate of the projecting metal; and it inhibits removal of recessed metal from the metal interconnects with the polishing pad providing a second pressure that decreases removal of the recessed metal.

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patent: 6326299 (2001-12-01), Homma et al.
patent: 6348076 (2002-02-01), Canaperi et al.
patent: 6436811 (2002-08-01), Wake et al.
patent: 6561875 (2003-05-01), Homma et al.
patent: 6620725 (2003-09-01), Shue et al.
patent: 6774041 (2004-08-01), Kondo et al.

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