Semiconductor device manufacturing: process – Chemical etching – Combined with coating step
Reexamination Certificate
2006-01-13
2010-11-23
Coleman, W. David (Department: 2813)
Semiconductor device manufacturing: process
Chemical etching
Combined with coating step
C438S698000, C257SE21246
Reexamination Certificate
active
07838427
ABSTRACT:
A method of planarizing a dielectric insulating layer including providing a substrate including forming a first dielectric insulating layer having a concave and convex portion on the substrate; forming an organic resinous layer on the first dielectric insulating layer and exposing the convex portion of the first dielectric insulating layer; isotropically etching the first dielectric insulating layer convex portion; removing the organic resinous layer; and, forming a second dielectric insulating layer on the first dielectric insulating layer.
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Quirk et al., Semiconductor Manufacturing Technology, Prentice-Hall, Upper Saddle River, New Jersey, 2001, pp. 519.
Coleman W. David
Kim Sun M
Taiwan Semiconductor Manufacturing Co. Ltd.
Tung & Associates
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