Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2008-04-01
2008-04-01
Chiang, Jack (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C716S030000
Reexamination Certificate
active
07353479
ABSTRACT:
A method for placing probing pad and a computer readable recording medium for storing a program thereof are provided. The method is suitable for placing the probing pads in an integrated circuit (IC). Wherein, appropriate grid spacing is determined and a plurality of grids with fixed grid spacing is generated. The location of each preformed grid on the net connecting to the interesting pin is defined as first candidate probing points. Then, based on the metal layer where the first candidate probing points are located and the corresponding locations between the first candidate probing points and the interesting pin, one candidate probing point among all of the first candidate probing points on each net where the probing pad can be placed on is selected as the probing point. Finally, a probing pad is placed on each of the selected probing points.
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Kang Szu-Sheng
Ku Chien-Yi
Chiang Jack
Faraday Technology Corp.
Hsu Winston
Parihar Suchin
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