Method for placing electrostatic discharge clamps within...

Details Method for placing electrostatic discharge clamps within... Method for placing electrostatic discharge clamps within...

2006-06-20

2006-06-20

Lin, Sun James (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000, C716S030000, C716S030000

Reexamination Certificate

active

07065728

ABSTRACT:
A method for placing electrostatic discharge clamps within integrated circuit devices is disclosed. A region is initially defined within an integrated circuit design. A list of ESD-susceptible circuits located within the defined region is then generated. The center of gravity of the ESD-susceptible circuits located within the defined region is located. Next, an ESD protection device is placed at the center of gravity of the ESD-susceptible circuits located within the defined region. A determination is made as to whether or not all ESD-susceptible circuits within the list of ESD-susceptible circuits are protected by the placement of the ESD protection device. If so, the process is repeated in other regions until the entire integrated circuit is addressed. Otherwise, the defined region is divided into at least two smaller regions and the process is repeated.

REFERENCES:
patent: 5362249 (1994-11-01), Carter
patent: 5744842 (1998-04-01), Ker
patent: 6457157 (2002-09-01), Singh et al.
patent: 6526548 (2003-02-01), Voldman
patent: 6560081 (2003-05-01), Vashchenko et al.
patent: 6621680 (2003-09-01), Segervall
patent: 2002/0153570 (2002-10-01), Lin et al.
patent: 2003/0173580 (2003-09-01), Coolbaugh et al.

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