Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2006-10-03
2006-10-03
Kik, Phallaka (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C716S030000, C700S097000, C700S110000
Reexamination Certificate
active
07117460
ABSTRACT:
A method is disclosed for modifying a device dimension extraction model. After collecting in-line data with regard to at least one feature of a device for one or more layouts, a proximity and linearity effect with regard to the feature based on the collected data is determined. Further, the device's electrically active region (OD) drawn size effect with regard to the feature is also determined based on the collected data. The dimension extraction model is modified based on at least two of the above three characterized effects.
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Chang Shou-Zen
Chen Wei-Ming
Hu Hsien-Pin
Lee Chia-Nan
Duane Morris
Taiwan Semiconductor Manufacturing Co. Ltd.
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