Method for performing pixel addressing operations for a tiled im

Details Method for performing pixel addressing operations for a tiled im Method for performing pixel addressing operations for a tiled im

1996-11-14

1999-09-07

Nguyen, Phu K.

Computer graphics processing and selective visual display system

Computer graphics processing

Graph generating

G06F 1500

Patent

active

059494298

ABSTRACT:
A method for performing pixel addressing operations for a tiled image. The method maintains separate X and Y components of a pixel address in a tiled image. Each component includes a tile and pixel index spaced apart by blank bit fields such that when combined, the X and Y components form a pixel address that is directly dereferenced to read or write a pixel in the tiled image. To decrement or increment the X or Y component, the method introduces a mask such that any carry bit can be moved across the blank bit field between the tile and pixel indices. This enables the method to use the same efficient add/subtract and mask operations whether or not a pattern of pixel accesses crosses a tile boundary. The X and Y components are represented as virtual X and Y coordinates in a two-dimensional array of pixels to hide the details of the add/subtract and mask operations from the programmer.

REFERENCES:
patent: 5524187 (1996-06-01), Feiner et al.
patent: 5561747 (1996-10-01), Crocker et al.
Gary Newman, "Organizing Arrays for Paged Memory Systems," Communication of the ACM, vol. 38. No. 7, Jul. 1995, pp. 93-103, and 108-110.

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