Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
Reexamination Certificate
2007-07-10
2007-07-10
Chung, Phung My (Department: 2138)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Memory testing
C714S718000, C365S201000
Reexamination Certificate
active
10605927
ABSTRACT:
A DDR DRAM having a test mode and an operational mode and a method for testing the DDR DRAM. The method includes in the order recited: (a) placing the DDR DRAM in test mode; (b) issuing a band activate command to select and bring up a wordline selected for write of the DDR DRAM; (c) writing with auto-precharge, a test pattern to cells of the DDR DRAM; (d) repeating steps (b) and (c) until all wordlines for write have been selected; (e) issuing a bank activate command to select and bring up a wordline selected for read of the DDR DRAM; (f) reading with auto-precharge, the stored test pattern from cells of the DDR DRAM; and (g) repeating steps (c) and (f) until all wordlines for read have been selected.
REFERENCES:
patent: 6496429 (2002-12-01), Murai et al.
patent: 6552951 (2003-04-01), Raj et al.
patent: 6819610 (2004-11-01), Miyo et al.
patent: 6853597 (2005-02-01), Jain
patent: 6914841 (2005-07-01), Thwaite
patent: 2003/0063517 (2003-04-01), Jain
Norris Alan D.
Weinstein Samuel
Wuensche Stephan
Capell Steven
Chung Phung My
International Business Machines - Corporation
Schmeiser Olsen & Watts
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