Method for patterning a semiconductor wafer

Details Method for patterning a semiconductor wafer Method for patterning a semiconductor wafer

2005-05-17

2005-05-17

Nguyen, Thanh (Department: 2813)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

C438S638000, C438S640000, C438S673000, C438S701000, C438S734000, C438S736000

Reexamination Certificate

active

06893954

ABSTRACT:
A method of efficiently fabricating a semiconductor device with less fabrication steps is provided. A second inter-layer insulation film is removed to form an aperture by substantially using a first hard mask film as a mask in accordance with the method of fabricating a semiconductor device having a multi-layer wiring structure using a dual-damascene method. In addition, an etching stopper film is removed, and then a first inter-layer insulation film is removed to form a via hole in the first inter-layer insulation film.

REFERENCES:
patent: 6153511 (2000-11-01), Watatani
patent: 6551445 (2003-04-01), Yokogawa et al.
patent: 6696222 (2004-02-01), Hsue et al.
patent: 20020195711 (2002-12-01), Usami
patent: 2000-12546 (2000-01-01), None
patent: 2000-36484 (2000-02-01), None
patent: 2000-124306 (2000-04-01), None
patent: 2001-53151 (2001-02-01), None

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