Method for pattern seeding and plating of high density...

Radiation imagery chemistry: process – composition – or product th – Imaging affecting physical property of radiation sensitive... – Making electrical device

Reexamination Certificate

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C430S324000, C430S329000, C427S098300, C427S304000

Reexamination Certificate

active

06207351

ABSTRACT:

BACKGROUND OF THE INVENTION
In conventional methods of forming circuitization by electroless plating onto dielectric materials, a seeding or catalyst layer is first blanket deposited on the substrate. Next a negative resist, typically a photoresist, is applied, over the seed layer and then the photoresist is exposed to light to form polymerized select portions of the resist. The photo resist is then developed using a developer, that is, a solvent which dissolves the unexposed portions of the photoresist and leaves the polymerized portions of the photoresist atop the seed layer. The portions of the photoresist that are removed by the developer correspond to the metal pattern of the circuitization for the circuit board. Typically, several processing steps are performed to accelerate the catalyst, modify the seed layer, etc. Thereafter, metal is electrolessly plated onto the bare, exposed portions of the seed layer, that is, the portions of the seed layer that are not covered by the photoresist. Thus metal is plated in the pattern of the bare seed layer not covered by the photoresist. The polymerized photoresist is then stripped using stripping solvents. As a result, portions of the seed layer, are covered by metal circuitization, while portions of the seed layer are exposed.
After plating, the processor is left with the decision whether to strip the exposed portion of the seed layer, that is the portion of the seed layer not covered by the electrolessly plated metal or permit the entire seed layer to remain. If the entire seed layer remains, the metal in the seed layer often conducts current from one electrical line in the circuit to another electrical line thereby creating a short circuit.
If the exposed portions of seed layer are to be stripped, this will necessitate another processing step. Moreover, the solvents needed to remove the seed layer, for example, alkaline cyanide solutions are typically not environmentally friendly, and such solvents often present disposal problems. Furthermore, such solvents often attack and degrade the circuitry and the dielectric materials.
It would be desirable to have a method for forming circuitization by electrolessly plating that does not leave a blanket seed layer, that is simple and does not require stripping of the seed layer.
SUMMARY OF THE INVENTION
The method for forming circuitization of the present invention provides a circuitized product which does not have a blanket seed layer and only has seed layer under the metal circuitization. Thus, short circuits between circuit lines are eliminated. It is a further advantage of the method of the present invention that it does not involve stripping portions of the seed layer. The method of the present invention requires less processing steps than conventional methods and employs positive resists which are developable by aqueous alkaline solutions. Specifically, the method of the present invention for forming circuitization in a circuit board comprising the following steps: providing a dielectric substrate; applying a positive photoresist to the dielectric substrate; then exposing the positive resist through art work corresponding to the desired circuit pattern; then developing the resist with an aqueous alkaline solution to form the circuit pattern in the resist; then applying a seeding composition to the patterned substrate of step d; exposing the remaining resist to actinic radiation; developing the remaining acidified resist with an aqueous alkaline solution to remove photoresist coated with seed to form a seed pattern; and then electrolessly plating metal onto the seed pattern so as to form the metallized circuit pattern.
DETAILED DESCRIPTION OF THE INVENTION
The method of the present invention is directed generally to the manufacturer of high density printed circuit boards using aqueous strippable resists. This method is applicable to electroless plating of metal, preferably copper, onto substrates including both organic and inorganic dielectric materials. Such dielectric materials comprise epoxy resins, ceramics and perfluorinated or chlorinated materials. The preferred substrate is made of a perfluorinated material. The substrate typically further has a layer of sacrificial copper disposed on the dielectric material and through holes or via disposed on or in the substrate, as desired, according to the circuit design.
The Method for Patterned Seeding
To form the metal circuitization on a substrate according to the method of the present invention, the surface is first optionally treated with a potassium anthracene solution that acts as an adhesion promoter for both the resist and seeding composition. A suitable potassium anthracene solution is 0.5 m potassium anthracene in NMP; other suitable potassium anthracene solutions are disclosed in U.S. Pat. No. 5,374,454 to Bickford et. al issued Dec. 20, 1994.
Next, an aqueous alkaline strippable resist, which is a resist capable of being removed from the substrate with an aqueous alkaline solution having a pH greater than about 8, is blanket coated onto the substrate. Both dry film and liquid types of aqueous alkaline strippable resists are suitable. Photosensitive resist materials are highly preferred. Suitable commercially available photosensitive resists include, for example, dry film resists available as RISTON 4700 and RISTON 4800 series from E.I. DuPont de Nemours Company, and AQUA-MER CF and AQUA-MER MP series from Hercules, Inc. Liquid resists include PHOTOPOSIT SP-20 from Shipley and RANTON 360 from Chemline. The resist layer is then patterned by first exposing the resist through art work to light at the appropriate wave length for the chosen photoresist. This light exposure causes carboxylic acids to form in the exposed portions of the photoresist, which are then removed, in the second development step. The photoresist is developed with a basic developer according to the resist manufacturers instructions. Suitable developers include, for example, sodium carbonate, potassium carbonate, alkali metal hydroxide solutions including for example, 0.2-0.3 M KOH solutions and 0.2-0.3 M sodium hydroxide solutions. As a result of the development, the pattern created in the resist corresponds to the desired circuit pattern.
Optionally, although preferably, a conditioner, such as a surfactant such as Polytech from Tecna Corporation or Reten from Hercules Corporation is blanket coated onto the substrate. The substrate, which requires no further washing, is then activated, that is seeded, by contact with a conventional seeding composition such as a seeding composition containing palladium chloride, HCL, and stannous chloride. The seed composition catalyzes the subsequent electroless copper deposition to the substrate. U.S. Pat. No. 4,448,804 to Amelio et al. issued May 15, 1995, describes the preferred Pd/Sn seed composition and Column 4 line 1 to Column 6 line 67 is incorporated herein by reference.
After the seed composition is deposited, the seeded substrate is blanket exposed to light at the appropriate wave length, to acidify the remaining photoresist. The substrate is then developed a second time using either the same developing solution as used in the first developing step or a different aqueous alkaline developing solution. As a result of the second developing step, the remaining resist is then developed and removed from the substrate. The remaining resist is removed and the seed that was deposited atop the resist is also removed. This second developing step has the further advantage of also accelerating the seed composition by removing some of the protective Sn from the surface of the seed deposit. It is not necessary to include a reducing agent in the developing solution.
As a result of the developing step, the seed is present on the substrate in a pattern which corresponds to the desired circuit pattern.
Next, the substrate is then contacted with conventional electroless plating bath preferably a copper plating bath. One such electroless copper plating bath is disclosed in U.S. Pat. No. 3,844,799 to Undkofler et al. The substrate is t

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