Method for passivating crystal silicon surfaces

Semiconductor device manufacturing: process – Formation of semiconductive active region on any substrate – Polycrystalline semiconductor

Reexamination Certificate

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Details

C136S249000, C136S261000, C427S074000, C427S255393, C427S255394, C438S057000, C438S482000, C438S490000, C438S492000, C438S503000

Reexamination Certificate

active

07629236

ABSTRACT:
In a method of making a c-Si-based cell or a μc-Si-based cell, the improvement of increasing the minority charge carrier's lifetime, comprising: a) placing a c-Si or polysilicon wafer into CVD reaction chamber under a low vacuum condition and subjecting the substrate of the wafer to heating; and b) passing mixing gases comprising NH3/H2through the reaction chamber at a low vacuum pressure for a sufficient time and at a sufficient flow rate to enable growth of an a-Si:H layer sufficient to increase the lifetime of the c-Si or polysilicon cell beyond that of the growth of an a-Si:H layer without treatment of the wafer with NH3/H2.

REFERENCES:
patent: 5903047 (1999-05-01), Liao et al.
patent: 6734037 (2004-05-01), Fath et al.
patent: 6746709 (2004-06-01), Lauinger et al.
patent: 2004/0112426 (2004-06-01), Hagino
patent: 60136259 (1985-07-01), None

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