Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2006-05-16
2006-05-16
Siek, Vuthe (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C703S014000, C703S015000, C703S016000
Reexamination Certificate
active
07047505
ABSTRACT:
A method for selecting a process for forming a device, includes generating a plurality of equations using a response surface methodology model. Each equation relates a respective device simulator input parameter to a respective combination of processing parameters that can be used to form the device or a respective combination of device characteristics. A model of a figure-of-merit circuit is formed that is representative of an integrated circuit into which the device is to be incorporated. One of the combinations of processing parameters or combinations of device characteristics is identified that results in a device satisfying a set of performance specifications for the figure-of-merit circuit, using the plurality of equations and the device simulator.
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Guardiani Carlo
McNamara Patrick D.
Saxena Sharad
Shibkov Andrei
Duane Morris LLP
Koffs Steven E.
Levin Naum
PDF Solutions, Inc.
Siek Vuthe
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