Method for optimizing direct wafer bond line width for...

Details Method for optimizing direct wafer bond line width for... Method for optimizing direct wafer bond line width for...

2011-08-30

2011-08-30

Verbitsky, Gail (Department: 2855)

Thermal measuring and testing

Leak or flaw detection

With heating or cooling of specimen for test

C374S045000, C374S057000

Reexamination Certificate

active

08007166

ABSTRACT:
A method for optimizing direct wafer bond line width for reduction of parasitic capacitance in a MEMS device by reducing the width of a bond line between a first and a second wafer, exposing the MEMS device to a water vapor for a predetermined time period and at a first temperature capable of evaporating water, cooling the MEMS device at a second temperature capable of freezing the water, and operating the MEMS device at a third temperature capable of freezing the water to determine if there is discontinuity during operation.

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